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+--- Thread: Library Files (/showthread.php?tid=138)



Library Files - mahalakshmir.ma - 11-15-2019

Hi,

I tried to include a new peripheral (PWM) into the PULPino environment, where can I get the library files for that peripheral or it will be auto generated.


RE: Library Files - kgf - 11-15-2019

What do you mean by a library file?


RE: Library Files - mahalakshmir.ma - 11-15-2019

(11-15-2019, 10:22 AM)kgf Wrote: What do you mean by a library file?
Thanks for your response. 
There are certain library files in the PULPino environment (vsim/modelsim_libs). 
So my query is will it get autogenerated or we need to specify the library files if so where can I find the library files for adding new peripherals.


RE: Library Files - mahalakshmir.ma - 11-15-2019

(11-15-2019, 10:37 AM)mahalakshmir.ma Wrote:
(11-15-2019, 10:22 AM)kgf Wrote: What do you mean by a library file?
Thanks for your response. 
There are certain library files in the PULPino environment (vsim/modelsim_libs). 
So my query is will it get autogenerated or we need to specify the library files if so where can I find the library files for adding new peripherals.

I took the PULPino environment from this link: https://github.com/pulp-platform/pulpino


RE: Library Files - mahalakshmir.ma - 11-19-2019

(11-15-2019, 11:45 AM)mahalakshmir.ma Wrote:
(11-15-2019, 10:37 AM)mahalakshmir.ma Wrote:
(11-15-2019, 10:22 AM)kgf Wrote: What do you mean by a library file?
Thanks for your response. 
There are certain library files in the PULPino environment (vsim/modelsim_libs). 
So my query is will it get autogenerated or we need to specify the library files if so where can I find the library files for adding new peripherals.

I took the PULPino environment from this link: https://github.com/pulp-platform/pulpino
Hi,
   Can anyone help me to resolve this issue (urgent).


RE: Library Files - kgf - 11-19-2019

If you are adding your own RTL description to an existing PULPino environment, you need to make sure that the new files are also somehow integrated to the build flow. This can be done by writing your scripts (not so difficult) or adapting the present scripts so that they also take into account the files that contain your description.

For example, for the Questasim simulation, you would use the following script:
   https://github.com/pulp-platform/pulpino/blob/master/vsim/vcompile/build_rtl_sim.csh

which will then call a number of scripts such as:
   https://github.com/pulp-platform/pulpino/blob/master/vsim/vcompile/rtl/vcompile_pulpino.sh

which has individual lines to compile parts such as
   vlog -quiet -sv -work ${LIB_PATH} +incdir+${RTL_PATH}/includes ${ASIC_DEFINES} ${CORE_DEFINES} ${RTL_PATH}/pulpino_top.sv

These files do not update automatically (it is not that easy to do properly). If you want, you can add the lines to compile your parts in these scripts as well. For each tool (FPGA compilation, ASIC mapping etc) you would need to do the same.

Just a word of caution, modifying your own processor is a fairly involved process. While our releases help, you still need to have the background and experience with the design tools you are using to be successful.


RE: Library Files - mahalakshmir.ma - 11-19-2019

(11-19-2019, 07:38 AM)kgf Wrote: If you are adding your own RTL description to an existing PULPino environment, you need to make sure that the new files are also somehow integrated to the build flow. This can be done by writing your scripts (not so difficult) or adapting the present scripts so that they also take into account the files that contain your description.

For example, for the Questasim simulation, you would use the following script:
   https://github.com/pulp-platform/pulpino/blob/master/vsim/vcompile/build_rtl_sim.csh

which will then call a number of scripts such as:
   https://github.com/pulp-platform/pulpino/blob/master/vsim/vcompile/rtl/vcompile_pulpino.sh

which has individual lines to compile parts such as
   vlog -quiet -sv -work ${LIB_PATH} +incdir+${RTL_PATH}/includes ${ASIC_DEFINES} ${CORE_DEFINES} ${RTL_PATH}/pulpino_top.sv

These files do not update automatically (it is not that easy to do properly). If you want, you can add the lines to compile your parts in these scripts as well. For each tool (FPGA compilation, ASIC mapping etc) you would need to do the same.

Just a word of caution, modifying your own processor is a fairly involved process. While our releases help, you still need to have the background and experience with the design tools you are using to be successful.
Thankyou for your response