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Target options for PULP RISC-V GNU Compiler Toolchain - mehrdad - 06-03-2020

Hi,

I have build the PULP RISC-V GNU Compiler Toolchain [1] with multilib. It contains the following targets:
Code:
$ riscv32-unknown-elf-gcc --print-multi-lib
rv32imfcxpulpv2/ilp32;@march=rv32imfcxpulpv2@mabi=ilp32
rv32imfcxpulpv2/ilp32f;@march=rv32imfcxpulpv2@mabi=ilp32f
rv32imcxpulpslim/ilp32;@march=rv32imcxpulpslim@mabi=ilp32
rv32ic/ilp32/mreg16;@march=rv32ic@mabi=ilp32@mreg=16
rv32imcxgap8/ilp32;@march=rv32imcxgap8@mabi=ilp32
rv32imcxgap9/ilp32;@march=rv32imcxgap9@mabi=ilp32

Using PULPissimo's pulp-configs for the processor IPs [2] I could get some info about the targets but still, I have few questions about these targets:
  • march=rv32ic, mreg=16:
    This is used for Micro-riscy. What is the difference compared to march=rv32ec of RISC-V GNU Compiler Toolchain [3]?
  • march=rv32imfcxpulpv2:
    Is this rv32imfc plus the extra instructions introduced in RI5CY? (e.g. hw loops)
  • march=rv32imcxpulpslim:
    What is this? I saw it has been used for zero-riscy [4]. What is the difference to rv32imc or rv32emc?
Thanks and kind regards,
Mehrdad

[1] https://github.com/pulp-platform/pulp-riscv-gnu-toolchain
[2] https://github.com/pulp-platform/pulp-configs/tree/master/configs/ips/riscv
[3] https://github.com/riscv/riscv-gnu-toolchain
[4] https://github.com/pulp-platform/pulp-training/blob/master/matrixMul8/Makefile


RE: Target options for PULP RISC-V GNU Compiler Toolchain - bluewww - 06-03-2020

(06-03-2020, 02:35 PM)mehrdad Wrote: Hi,

I have build the PULP RISC-V GNU Compiler Toolchain [1] with multilib. It contains the following targets:
Code:
$ riscv32-unknown-elf-gcc --print-multi-lib
rv32imfcxpulpv2/ilp32;@march=rv32imfcxpulpv2@mabi=ilp32
rv32imfcxpulpv2/ilp32f;@march=rv32imfcxpulpv2@mabi=ilp32f
rv32imcxpulpslim/ilp32;@march=rv32imcxpulpslim@mabi=ilp32
rv32ic/ilp32/mreg16;@march=rv32ic@mabi=ilp32@mreg=16
rv32imcxgap8/ilp32;@march=rv32imcxgap8@mabi=ilp32
rv32imcxgap9/ilp32;@march=rv32imcxgap9@mabi=ilp32

Using PULPissimo's pulp-configs for the processor IPs [2] I could get some info about the targets but still, I have few questions about these targets:
  • march=rv32ic, mreg=16:
    This is used for Micro-riscy. What is the difference compared to march=rv32ec of RISC-V GNU Compiler Toolchain [3]?
  • march=rv32imfcxpulpv2:
    Is this rv32imfc plus the extra instructions introduced in RI5CY? (e.g. hw loops)
  • march=rv32imcxpulpslim:
    What is this? I saw it has been used for zero-riscy [4]. What is the difference to rv32imc or rv32emc?
Thanks and kind regards,
Mehrdad

[1] https://github.com/pulp-platform/pulp-riscv-gnu-toolchain
[2] https://github.com/pulp-platform/pulp-configs/tree/master/configs/ips/riscv
[3] https://github.com/riscv/riscv-gnu-toolchain
[4] https://github.com/pulp-platform/pulp-training/blob/master/matrixMul8/Makefile

I believe the micro-riscy mreg=16 thing predates rv32e, but I don't know the exact differences.


rv32imfcxpulpv2 is indeed imfc plus xpulpv2 (x denotes a custom extension, in this case our pulpv2). In the RI5CY manual you can see what instructions are available and for example here  https://github.com/pulp-platform/pulp-riscv-binutils-gdb/blob/a58e6c3fcd406915ca6e4ab654a48def358de903/opcodes/riscv-opc.c you can see the full opcode table of included instructions.

In that table you can also see what rv32imcxpulpslim (rv32 imc + xpulpslim). Basically the 9 additional instructions, most notably p.elw for interaction with the cluster event unit.


RE: Target options for PULP RISC-V GNU Compiler Toolchain - mehrdad - 06-06-2020

(06-03-2020, 03:06 PM)bluewww Wrote:
(06-03-2020, 02:35 PM)mehrdad Wrote: Hi,

I have build the PULP RISC-V GNU Compiler Toolchain [1] with multilib. It contains the following targets:
Code:
$ riscv32-unknown-elf-gcc --print-multi-lib
rv32imfcxpulpv2/ilp32;@march=rv32imfcxpulpv2@mabi=ilp32
rv32imfcxpulpv2/ilp32f;@march=rv32imfcxpulpv2@mabi=ilp32f
rv32imcxpulpslim/ilp32;@march=rv32imcxpulpslim@mabi=ilp32
rv32ic/ilp32/mreg16;@march=rv32ic@mabi=ilp32@mreg=16
rv32imcxgap8/ilp32;@march=rv32imcxgap8@mabi=ilp32
rv32imcxgap9/ilp32;@march=rv32imcxgap9@mabi=ilp32

Using PULPissimo's pulp-configs for the processor IPs [2] I could get some info about the targets but still, I have few questions about these targets:
  • march=rv32ic, mreg=16:
    This is used for Micro-riscy. What is the difference compared to march=rv32ec of RISC-V GNU Compiler Toolchain [3]?
  • march=rv32imfcxpulpv2:
    Is this rv32imfc plus the extra instructions introduced in RI5CY? (e.g. hw loops)
  • march=rv32imcxpulpslim:
    What is this? I saw it has been used for zero-riscy [4]. What is the difference to rv32imc or rv32emc?
Thanks and kind regards,
Mehrdad

[1] https://github.com/pulp-platform/pulp-riscv-gnu-toolchain
[2] https://github.com/pulp-platform/pulp-configs/tree/master/configs/ips/riscv
[3] https://github.com/riscv/riscv-gnu-toolchain
[4] https://github.com/pulp-platform/pulp-training/blob/master/matrixMul8/Makefile

I believe the micro-riscy mreg=16 thing predates rv32e, but I don't know the exact differences.


rv32imfcxpulpv2 is indeed imfc plus xpulpv2 (x denotes a custom extension, in this case our pulpv2). In the RI5CY manual you can see what instructions are available and for example here  https://github.com/pulp-platform/pulp-riscv-binutils-gdb/blob/a58e6c3fcd406915ca6e4ab654a48def358de903/opcodes/riscv-opc.c you can see the full opcode table of included instructions.

In that table you can also see what rv32imcxpulpslim (rv32 imc + xpulpslim). Basically the 9 additional instructions, most notably p.elw for interaction with the cluster event unit.

Thanks a lot for the prompt response.