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Does Pulpissimo already contain VCC & GND pins? - Printable Version

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Does Pulpissimo already contain VCC & GND pins? - traVc - 01-03-2021

I was wondering whether Pulpissimo already contains VCC & GND (power supply) pins or if those have to be added for ASIC design?

If they have to be added - what would be the easiest way to do so?


RE: Does Pulpissimo already contain VCC & GND pins? - kgf - 01-03-2021

PULPissimo does not contain any technology specific cells, which also includes the power/ground pads that are needed when making an ASIC. Anyone with experience with an ASIC design flow should not have any issues adding these pads to the design.


RE: Does Pulpissimo already contain VCC & GND pins? - traVc - 01-03-2021

Thank you so much for your quick reply.

As you have probably already guessed I am not that familiar with an ASIC design flow (I'd say I know the very basics).

My initial idea was to create a new "top"-module which contains the VCC and GND pin and then instantiates the former pulpissimo top module while passing GND and VCC to it. But then I would have to pass GND and VCC to every I/O pin which sounds tedious...does this sound right to you?


RE: Does Pulpissimo already contain VCC & GND pins? - kgf - 01-03-2021

Hello,

I am not very sure what you are trying to do (why do you want to add VCC and GND pins?). Normally the power connections are not handled at RTL level. Most digital design flows leave the power connections to the tools, i.e. use a power intent file (like CPF) to tell the tools how to do the power connections. If you are using a single power domain, there is technically no need to deal with the power during the front-end design flow at all.

Physical netlists may be designed to contain power pins which is sometimes needed for LVS, or sometimes for power aware simulations, however these are needed towards the end of an ASIC design cycle.