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Pulpino UART - Printable Version

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Pulpino UART - nemanja-rv - 02-04-2022


I spent some time in the previous few days to port Pulpino platform to ZC706 board and Vivado 2019.2.
I successfully brought up the board and as far as I could see, the spiloader can download the compiled code to the ri5cy core. The core boots and starts working. 

One minor thing that I cannot seem to solve is the UART baudrate. I have tried setting the microcom running on linux to 115200 baudrate but it just receives some wrong characters. The app that I am running on the Pulpino is fpga_test app so it should continously transmit something over the uart. How is the baudrate set for Uart? In addition, I noticed that the spiloader app sets the clock frequency (configuration of the clk_wiz) to 5MHz. I would like to change that parameter, to set to 50MHz or any other but I assume there has to be some other change in sw code. I assume this also have impact on baud rate configuration. 

Any advice would be appreciated.