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PULPino Boot ROM Address problem - Printable Version

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+--- Thread: PULPino Boot ROM Address problem (/showthread.php?tid=332)



PULPino Boot ROM Address problem - Jay Huang - 11-30-2023

Hi, I am Jay Huang, a Verification Engineer at Taiwan Electronic System Design Automation (TESDA). Currently, we are utilizing your open-source SOC, PULPino, to develop our verification tools.

During the course of our SOC implementation, we have encountered some challenges related to the PULPino Boot ROM, prompting us to seek clarification on certain aspects. According to the datasheet Memory Map, the Boot ROM's address range is specified as 0x0008_0000 to 0x0008_0200.

In an attempt to integrate this information into our testbench, I observed that when attempting to read from this address range, no data was retrieved. After further investigation, it was determined that the Boot ROM is, in fact, located immediately following the Instruction Memory, rather than at the specified address.

I would like to ask if it is correct to set the start address of the Boot ROM at 0x0000_8000 if the Instruction Memory is configured as 32KB?
If this configuration is indeed correct, I am curious as to why the Boot ROM's address in the datasheet is documented as 0x0008_0000 to 0x0008_0200.

Your insights and guidance on this matter would be immensely valuable to us in resolving the issues we are currently facing. Thank you for your time and attention to this inquiry.


RE: PULPino Boot ROM Address problem - kgf - 12-29-2023

Hello,

First of all, PULPino is really not the thing to use, we would suggest using PULPissimo or if that one is too complex, maybe the Xheep https://github.com/esl-epfl/x-heep from our colleagues at EPFL.

PULPino has many configuration options, but the defaults seem to be 0x0000 8000 in the code:

https://github.com/pulp-platform/pulpino/blob/6631c49ba38a9258da44d6b120d902f7b81f9233/rtl/includes/config.sv#L23
`define ROM_START_ADDR 32'h8000

As this code is not really maintained, there is the possibility that the datasheet is not correct. The cvhange may also have been to make FPGA ports simpler (where the difference between a ROM and the instruction memory is not really that much, keeping them closer might ha simplified things).

Hope that helps
KGF