03-01-2022, 04:20 AM
(02-28-2022, 02:37 PM)kgf Wrote: The FLL will need a DCO which has a bit of an analog block inside. That block (unfortunately) we are not allowed to share as it is technology dependent analog IP. Basically an FLL is practical if you are looking for on-chip clocks higher than 200-300 MHz. Otherwise external clocks can easily be pushed through the pads.
Finding a usable / available clocking IP is not very easy, in the end, we were forced to design our own.
Thanks for this insight.