RISCY modifications possibilties
#1
Riscy and zero riscy cores based on the RISC V ISA are available as a part of different PULP systems. The specific custom extensions in the RISC V ISA are supported by the compiler. 

I was wondering If I can make changes to the RISCY core for eg adding a new h/w block like the h/w loop controller.
First of all with the given SDK is that even possible?
And is there a possibility of getting software support for such modifications. 

Thanks!
Reply


Messages In This Thread
RISCY modifications possibilties - by Athena - 01-23-2019, 11:00 AM
RE: RISCY modifications possibilties - by kgf - 01-28-2019, 11:55 AM
RE: RISCY modifications possibilties - by Athena - 01-28-2019, 09:49 PM
RE: RISCY modifications possibilties - by kgf - 01-30-2019, 04:17 PM
RE: RISCY modifications possibilties - by Athena - 02-01-2019, 08:57 AM

Forum Jump: