FPGA build
(05-15-2019, 11:17 AM)kgf Wrote: We are still working on the release of the FPGA mapping for PULPissimo. It is I would say more than 90% done, but the last 10% is where a lot of small details hide.

I can see from testbench files that there are some writings to registers for example "JTAG Register = 003".
What registers & settings needs to be written before we can expect to be able successfully write&read to/from memory in FPGA?


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FPGA build - by Akim - 05-15-2019, 11:00 AM
RE: FPGA build - by kgf - 05-15-2019, 11:17 AM
RE: FPGA build - by Akim - 06-05-2019, 07:34 AM

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