Luca Benini

Benevolent Dictator for Life and overall inspirator of the PULP Platform project.

Davide Rossi

Project Leader responsible for the overall architectural development and for ASIC backend implementation. Main responsible for the DMA IP.

Francesco Conti

PULP “evangelist” and leader of HW acceleration and near sensor analytics efforts.

Frank K. Gürkaynak

Main responsible for EDA tools used for PULP development, for ASIC testing and for PULP didactic usage.

Andrea Cossettini

Andrea leads efforts in ultrasound and manages the Future Computing Lab (EFCL).

Ahmad Mirsalari

Ahmad works on ML for Approximate Computing, studying variable- and mixed-precision computing techniques to improve energy efficiency.

Alessandro Capotondi

Co-designer of the OpenMP parallel programming runtime for PULP.

Alessandro Nadalini

Alessandro works on RISC-V ISA extensions dedicated to the acceleration of mixed-precision QNNs inference on PULP clusters.

Alessandro Ottaviano

Alessandro researches the next generation Snitch based PULP systems.

Alessio Burello

Co-developer of DORY (Development Oriented to memoRY) framework for deep neural network execution on PULP.

Alfio Di Mauro

Event-based computing expert and tester guru in the making.

Amirhossein Kiamarzi

Amirhossein focuses on modeling hardware processors, accelerators and vector processor applications on GVSoC.

Andreas Kurth

1st Lieutenant of the group, keeper of HERO, the big PULP.

Angelo Garofalo

Angelo is working on PULP-NN, an optimized library for QNN inference on PULP Clusters.

Antonio Pullini

Lead designer of all PULP external interfaces and of the uDMA subsystem. The go-to person for ASIC backend implementation.

Arpan Prasad

Arpan will work on hardware accelerator design for Machine Learning Applications.

Benedetta Mazzoni

Benedetta works on ML algorithms and systems for bio applications in real-time optimized for PULP.

Chi Zhang

Chi works on memory systems and interfaces. His interests include HPC architectures, energy-efficient HW and heterogenous architectures.

Cristian Cioflan

Cristian aspires to become the master of ML on constrained embedded devices and strives to bring "Aha!" moments to our students.

Christoph Leitner

Christoph's research is focused on ultrasound applications.

Cyril Koenig

Cyril works on our heterogenous HPC architecture. His interests include SoC design and low level programming.

Daniele Palossi

Daniele researches deep learning applications for PULP-based autonomous flying drones.

Davide Nadalini

In an effort to make things smart(er), Davide develops On-Device Learning applications for PULP.

Florian Glaser

Designer and maintainer of the new event unit in PULP.

Gamze Islamoglu

Gamze works on hardware architectures for machine learning applications.

Georg Rutishauser

Georg works on mixed-precision ML acceleration and compression techniques for deep-learning related memory transfers.

Germain Haugou

Leader of all software integration efforts, main developer of the PULP hardware abstraction layer, runtime and SDK.

Gianna Paulin

Gianna works on machine learning applications.

Giuseppe Tagliavini

Develops compiler extensions and exotic runtime environments for emerging computing paradigms. A space cowboy of embedded SW.

Hanna Müller

Hanna works on drones and wind turbine monitoring.

Jannis Schönleber

Jannis works on deep neural network acceleration. He is an open-source enthusiast, particularly open hardware initiatives.

Jonas Kühne

Jonas researches computer vision and perception for drone applications.

Julian Moosmann

Julian works on tinyML applications for PULP, especially using dynamic vision cameras.

Lorenzo Lamberti

Lorenzo works on drones.

Luca Bertaccini

Luca works on PULP based accelerators.

Luca Bompani

Luca is the developer of Ultra-low power machine learning based application.

Luca Colagrande

Luca researches efficient and scalable HPC systems.

Luca Valente

Luca works on debugging PULP and testing peripherals.

Luka Macan

Luka is our Croatian PULP enthusiast who is working on tools for deployment of deep learning applications on our platforms.

Mahyar Pourjabar

Mahyar works on drone swarm applications and indoor localization.

Maicol Ciani

Maicol's work is focused on security extensions to PULP SoCs.

Manuele Rusci

Designer of interfaces with ultra-low power sensors, and developer of related applications.

Marcello Zanghieri

Marcello works on Deep Learning for Human-Machine Interfaces, researching models suitable for execution on ultra-low-power microcontrollers.

Marco Bertuletti

Marco implements DSP algorithms on PULP and parallelizes algorithms of 5G PUSCH channel on Mempool.

Marco Guermandi

Designer of PULP-based Human-Machine-Interfaces and related applications.

Matteo Perotti

Matteo works on PULP core development.

Mattia Orlandi

Mattia researches bioinspired approaches for developing ultra low-power Human-Machine Interfaces based on ExG signals.

Mattia Sinigaglia

Our peripheral's master. Mattia works on integrating and testing peripherals in PULP.

Michael Rogenmoser

Michael will be working on adding fault tolerance to PULP systems. He wants to be the first PULP member in space.

Moritz Scherer

Moritz's research focuses on ML accelerators.

Moritz Schneider

Our expert for security extensions on PULP systems

Nazareno Bruschi

Nazareno works on quantized neural networks in extreme edge devices and GVSoC PULP Simulator.

Nils Wistoff

Nils works on securing RISC-V architectures and supporting Ariane development.

Paul Scheffler

Paul researches future PULP systems.

Philip Wiese

Philip focuses on the deployment of ML models on heterogeneous many-core systems and environmental sensing with on-device training capabilities.

Philipp Mayer

Philipp is going to develop embedded applications around PULP.

Pierangelo Rapa

Pierangelo works on biosignals and ultra-low-power HMIs with specific emphasis on their application in the automotive industry.

Pirmin Vogel

Leads efforts to use PULP within a heterogeneous system architecture; designer of the Linux driver runtime for ARM based host systems.

Riccardo Tedeschi

Riccardo works on extending PULP IPs to address safety critical applications.

Robert Balas

Robert works on debugging PULP.

Samuel Riedel

Samuel works on MemPool and the synchronization of manycore systems.

Sergei Vostrikov

Sergei works on ultrasound architectures.

Sergio Mazzola

He will be involved in the Ampere project working on multi-criterion optimization making the use of HERO.

Thomas Benz

Thomas works on PULP cores.

Thorir Ingolfsson

Thorir works on Machine Learning applications.

Tim Fischer

Tim works on HPC systems for Machine Learning and AI workloads.

Tommaso Polonelli

Designer of multi-protocol wireless interfaces and developer of related applications.

Victor Jung

Victor tweaks algorithms so that they work on our newest platforms.

Victor Kartsch

Victor develops ultra low-power Human Machine Interaction applications based on EMG/EEG signals.

Viviane Potocnik

Viviane will be working on MiniFloat training on Snitch-based platforms and developing the software stack for novel hardware architectures.

Vlad Niculescu

Vlad works on drone applications.

Xiaying Wang

Xia works on programming PULP-based systems.

Yichao Zhang

Yichao is our new PhD student who will conduct his research in IC physical design.>

Yvan Tortorella

Yvan works on developing computing architectures and accelerators for space applications.

Zexin Fu

Zexin works on cache systems, cache coherence and on-chip network design.

Silent / Past collaborators

Current collaborators without a profile image
  • Eric Flamand - Designer of our RISC-V ISA extensions for DSP and main developer of the enhanced GCC toolchain for RI5CY.
  • Igor Loi - Lead designer of all internal interconnect IPs and of the cluster instruction cache. He is also the responsible for frontend ASIC synthesis.
Past collaborators
  • Matheus Cavalcante - worked on vector processing unit of PULP for HPC architectures
  • Manuel Eggimann - worked on ExG signal related biomedical applications
  • Matteo Spallanzani - worked on data analytics, ML, QNN and algorithmic optimizations
  • Florian Zaruba - designer of the PULPino Imperio chip, developer of Ariane, master of the Snitches
  • Stefan Mach - the ultimate master of the Floating Point Unit (FPU)
  • Michael Hersche - used to work on Machine Learning applications
  • Fabio Montagna - worked on human-computer interfaces based on ExG signals
  • Francesco Paci - works on Embedded Computer Vision at GreenWaves Technologies in Grenoble
  • Fabian Schuiki - standard-cell memory guru, hardware designer and tamer of the Snitches
  • Davide Schiavone - designer of the DSP extensions for the OR10N and RI5CY cores, and the RI5CY maintainer
  • Andrea Marongiu - co-designer of the OpenMP parallel programming runtime for PULP
  • Maxim Mattheuws - worked on predictable execution of PULP-based systems
  • Michael Schaffner - used to be the co-leader of the development of the shared FPU/LNU IPs for PULP and the main author of our logo
  • Michael Gautschi - used to be the leader of the PULPino project and of the development of the shared FPU/LNU. He was also one of the designers of the OR10N and RI5CY cores
  • Giovanni Rovere - worked on the VivoSoC project
  • Renzo Andri - original co-designer of the OR10N core
Past student contributions
  • Andreas Traber - Designer and main maintainer of the RI5CY core, and original designer and maintainer of PULPino.
  • Sven Stucki - Original designer of the porting of OR10N to the RISC-V ISA, which became the RI5CY core.
  • Robert Schilling - Designer of encryption HW accelerator for the PULP platform.
  • Matthias Baer - Original co-designer of the OR10N core.