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Hi,
I am trying to simulate CV32E40P core. In example_tb file in core folder there is a make file. It is showing error


vlib-"10.7b" work
/bin/sh: 1: vlib-10.7b: not found
make: *** [Makefile:87: .lib-rtl] Error 127

I read in the documentation that there is a separate repository for verification. I have run the makefile in core-v-verif/cv32/sim/core. i was able to run hello world program. But i dont why in CV32E40P core it was not running.

I wanted to explore floating point unit in CV32E40P core. Can you please say how to simulate with system verilog files

I am not able to understand how to give input to the core. Please help me

Thanks in advance

Hi gsaitejareddy,
the cv32e40p core and test setup is maintained by the openhardware group.

You can ask question about the core and its test setup at
https://github.com/openhwgroup/cv32e40p
https://github.com/openhwgroup/core-v-verif

They are more likely able to help you.

(02-08-2021, 10:25 AM)bluewww Wrote: [ -> ]Hi gsaitejareddy,
the cv32e40p core and test setup is maintained by the openhardware group.

You can ask question about the core and its test setup at
https://github.com/openhwgroup/cv32e40p
https://github.com/openhwgroup/core-v-verif

They are more likely able to help you.

Thank you