How it all started

The Parallel Ultra Low Power (PULP) Platform started as a joint effort between the Integrated Systems Laboratory (IIS) of ETH Zürich and Energy-efficient Embedded Systems (EEES) group of the University of Bologna in 2013 to explore and develop new and efficient computing architectures leveraging the RISC-V open ISA and open-source, collaborative hardware design. While the initial scope of PULP was low-power devices, it has now expanded its reach to large, high-performance systems, including many-core RISC-V chiplets.

The project developed over more than 10 years and 50 fabricated chips to become one of the most well known open-source projects worldwide - mainly thanks to the widespread industry adoption of its open-source IPs: as of today, 5 among the top 6 trending projects for SystemVerilog on GitHub worldwide have originated from PULP, the first being OpenTitan!

Aim of the project

Our aim is to develop an open, scalable hardware and software research and development platform with the goal to break the energy efficiency barrier within a power envelope of a few milliwatts, as well as satisfy the computational demands of IoT applications requiring flexible processing of data streams generated by multiple sensors, such as accelerometers, low-resolution cameras, microphone arrays and vital signs monitors.

PULP as a parallel ultra-low power platform

PULP includes a state-of-the-art microcontroller system and a multi-core platform able to achieve leading-edge energy-efficiency and widely-tunable performance. Compared to single-core microcontroller units, a parallel ultra-low-power programmable architecture allows meeting the computational requirements of IoT applications, without exceeding the power envelope of a few milliwatts typical of miniaturized, battery-powered systems.

PULP as an open-source platform

We have intentionally taken an open-source approach from the very onset of the project and so far, we have released efficient 32 and 64bit implementations based on the open-source RISC-V instruction set architecture, peripherals and complete systems starting from simple micro-controllers, to the state-of-the-art OPENPULP release which sets a new bar for low-power multicore IoT processors. Additionally, PULP intends to support multiple application programming interfaces such as OpenMP, OpenCL™ and OpenVX™ that allow agile application porting, development, performance tuning and debugging.

Get involved

You can access PULP implementations and submit issues directly on our GitHub page. We are continuously updating the code and application examples. We also have a mailing list to share new developments and listen to change requests. You can subscribe to it by sending mail to: sympa(at)list.ee.ethz.ch with subscribe pulp-info Firstname Lastname as the subject. Last thing, don't forget to follow us on Twitter.