01-07-2021, 03:53 PM
(This post was last modified: 01-07-2021, 03:55 PM by FrankieTankie.)
Hello,
I'm currently trying to set up a Pulpissimo IP Core which can be used with Vivado IP Integrator to fasten the integration of AXI peripherals. I managed so far to route the AXI slave channels to the TL domain where I added corresponding pads which can be used to create an AXI AMBA interface. As the slave interface uses a 64-bit data channel I'm going to use Xilinx data converter IP to get a 32-bit data channel. What I'm missing at the moment is AXI clock and reset channels.
My question therefore is if the cluster clock would be suitable to use it, if there is already a dedicated AXI clock or reset, or if a dedicated clock divider for AXI has to be integrated. In the last case the question would be where to get a suitable clock signal.
Any is appreciated.
Regards,
Frankie
I'm currently trying to set up a Pulpissimo IP Core which can be used with Vivado IP Integrator to fasten the integration of AXI peripherals. I managed so far to route the AXI slave channels to the TL domain where I added corresponding pads which can be used to create an AXI AMBA interface. As the slave interface uses a 64-bit data channel I'm going to use Xilinx data converter IP to get a 32-bit data channel. What I'm missing at the moment is AXI clock and reset channels.
My question therefore is if the cluster clock would be suitable to use it, if there is already a dedicated AXI clock or reset, or if a dedicated clock divider for AXI has to be integrated. In the last case the question would be where to get a suitable clock signal.
Any is appreciated.
Regards,
Frankie