Hello,

I'm a beginner and for the past two weeks I've been trying to compile applications on Zedboard (Pulpissimo), but I was unable to execute the "make" command for the pulp-sdk without getting errors.

I've tried to build the pulp-sdk commit 3256fe7, since newer commits apparently don't support board_targets anymore and tried to build the pulp-sdk on both Ubuntu 16.04 (fresh distribution, on VM using VirtualBox, as recommended in pulp-sdk's git commit id 3256fe7 Readme) and Ubuntu 18.04 (fresh distribution, on VM using VirtualBox, after changing my default gcc, gcc-7, to gcc-5, as recommended in pulp-sdk's git commit id 3256fe7 Readme an with conda environment with python3.5 and correspondent version pip installed).

I've successfully built the pulp-riscv-gnu-toolchain (the toolchain's version referenced by the pulp-sdk's git commit id 3256fe7 Readme) and I've also been able to generate and flash the Pulpissimo bitstream to the Zedboard. However, I can't make the SDK work, which I assume is the only supported way to compile applications on the FPGA with Pulpissimo.

On Ubuntu 16.04, this is the error message that keeps showing after "make all" for pulp-sdk (on root shell, since it's installation path is /opt/riscv, which lacks writing permissions unless I'm root):

Traceback (most recent call last):
  File "./pulp-tools/bin/plpbuild", line 3, in <module>
    import plptools as plp
  File "/opt/riscv/pulp-sdk/pulp-tools/bin/plptools.py", line 23, in <module>
    import plptools_builder
  File "/opt/riscv/pulp-sdk/pulp-tools/bin/plptools_builder.py", line 19, in <module>
    from twisted.internet import protocol, reactor, endpoints
  File "/usr/local/lib/python3.5/dist-packages/twisted/__init__.py", line 10, in <module>
    from twisted._version import __version__ as version
  File "/usr/local/lib/python3.5/dist-packages/twisted/_version.py", line 8, in <module>
    from incremental import Version
  File "/usr/local/lib/python3.5/dist-packages/incremental/__init__.py", line 469
    opt_in: bool
          ^
SyntaxError: invalid syntax
Makefile:6: recipe for target 'all' failed
make: *** [all] Error 1

On Ubuntu 18.04, this is the error message that keeps showing after "make all" for pulp-sdk (also on root shell):

make[2]: /opt/riscv/pulp-sdk/pkg/pulp_riscv_gcc/1.0.13/bin/riscv32-unknown-elf-gcc: Command not found
/opt/riscv/pulp-sdk/build/sdk/pulp-rt/pulpissimo/__rules.mk:58: recipe for target '/opt/riscv/pulp-sdk/build/sdk/pulp-rt/pulpissimo/rt/fc/kernel/init.o' failed
make[2]: *** [/opt/riscv/pulp-sdk/build/sdk/pulp-rt/pulpissimo/rt/fc/kernel/init.o] Error 127
make[2]: Leaving directory '/opt/riscv/pulp-sdk/runtime/pulp-rt'
Makefile:115: recipe for target 'build_all' failed
make[1]: *** [build_all] Error 2
make[1]: Leaving directory '/opt/riscv/pulp-sdk/runtime/pulp-rt'
Reached EOF with exit status 2
FATAL ERROR: the command 'build' has failed
Makefile:6: recipe for target 'all' failed
make: *** [all] Error 255

I'd like to know if it is still possible nowadays to compile and run applications for the Zedboard with Pulpissimo and, if so, I'd like some advice on what I'm doing wrong.

Thanks in advance!

Hi everyone

I am looking for the repo which contains the functions in the headline. I think they are in c code.
I would be grateful if someone can provide me with this repo

thanks in advance

Hi everyone,
I am trying to find the compiler toolchain for the XpulpNN micro architecture.
Has anyone ever dealt with this micro architecture before?
Thanks in advance, and have a great day!

Hello, everyone!

I've been trying to simulate a Snitch cluster, and I'm currently facing an issue while compiling software to execute with snitch_cluster.vsim. Specifically, the clang compiler doesn't seem to recognize the -mcpu=snitch option.

This leads me to believe that my llvm for PULP platform build wasn't successful. Here's an overview of what I've done so far:

1. I cloned the LLVM repository at https://github.com/pulp-platform/llvm-project 
   
2. Built LLVM and clang with the following options:
   
   
   Code:

   cmake \
    -DCMAKE_BUILD_TYPE="Release" -DLLVM_ENABLE_ASSERTIONS=ON \
    -DCMAKE_INSTALL_PREFIX=${INSTALLPREFIX} \
    -DLLVM_ENABLE_PROJECTS="clang" \
    -DLLVM_TARGETS_TO_BUILD="RISCV" \
    -DLLVM_DEFAULT_TARGET_TRIPLE="riscv32-unknown-elf" \
    -DLLVM_APPEND_VC_REV=OFF \
    -G "Unix Makefiles" ../llvm
   
   
3. Updated my PATH to include the /build/bin directory, the build itself and clang seems to be working properly.
   

Hi I would like to know about the i2s model and interface used in pulpissimo.Im using the I2s vip with the RTL at RTL github and the reference manual at  Doc .I had configured the i2s vip as master (using the i2c)that transmits the data and udma as slave to receive it.
Upon observation ,I noticed that :
The I2s vip  transmits data but starts the ws line after the first word.causing the udma i2s to only start receiving data from the second word (the first word is lost).Is this a problem with the i2s vip or due to design considerations involving the i2s protocol.

Some further doubts on :
1)What is the function of snap enable in the i2s vip .
2)How do I enable pdm mode in the i2s receiver udma side.There seems to be working registers for it and configuration wires for it but the documentation is not very clear.
Is it functional and can the i2s interface be configured to accept data in pdm mode?
Does it require only two lines ,the clk and data ?
Also the register documentation seems incomplete with a pdm enable bit that's not in the reference manual with regards to the i2s pdm setup register on page 91 of the manual.

Hello all, 

Diring a research project we are planning on using the multi core pulp. We started digging and we have multiple questions and inquiries that we would appreciate your help for: 
1. Where can we find the most updated data for PULP ? The github repository was last updated 2 years ago (?) is this accurate ? Can we rely on that ? 
2. What are the simulation tools that were used and which version work for sure ? I saw alot of questions regarding this point but couldn’t find a decisive answer  
3. In the future, we plane to go for tape-out. Are there any scripts that were used for Synthesis and Place-and-Route ? 
4. Benchmarking: other than the regression tests and simple tests that are available in the repository, is there any other platform or benchmarking guidelines for the multi core pulp ? Or should we build our benchmarks from scratch ? 
5. The SDKs in the repository seems to updated last time in 2019, is that okay ? Does work properly? 
6. Do you have a support for PLLs inside the core or the implementation of IO rings that we could get help from ? 


Your help is much much appreciated, 
Looking forward to hear from you. 

Best, 
Firas

Hi all,

I've created a discord for anyone interested in joining a working group to work on getting pulpissimo setup.

https://discord.gg/E2wFA9ub

We are also keen to speak to people using Pulpissimo to understand there issues and how they've overcome them.

Dave and Liam

Hello, this is my first time working with PULPissimo for my research group’s project, and I’ve encountered some questions during its use:

1. Why does PULPissimo seem to lack an L1 cache?
   
2. If both data and instructions rely on the L2 cache for caching, wouldn’t that lead to potential conflicts?
   

what is meaning of CVA6(Ariane)? i think CVA6 is riscv 6 stage cpu?, and how about ariane?

i have some simple question of the name of vector processor

what is the meaning of ARA? is it come from CVA6?(Ariane)