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Latest Threads
Doubts regarding I2S mode...
Forum: PULP General questions
Last Post: Zyb
01-09-2025, 11:56 AM
» Replies: 0
» Views: 99
Multi Core PULP first tim...
Forum: PULP General questions
Last Post: kgf
01-02-2025, 02:23 PM
» Replies: 1
» Views: 296
Which SDK to be used to c...
Forum: PULP General questions
Last Post: lisamartin
12-23-2024, 02:34 AM
» Replies: 2
» Views: 2,103
Pulpissimo Support Group ...
Forum: PULP General questions
Last Post: Roogadget
12-04-2024, 11:19 AM
» Replies: 0
» Views: 244
Pulp - make build
Forum: PULP General questions
Last Post: Francis Ortega
11-29-2024, 09:02 AM
» Replies: 2
» Views: 706
some questions about pulp...
Forum: PULP General questions
Last Post: jsen_che11
11-28-2024, 03:54 AM
» Replies: 3
» Views: 792
issue with pulp build
Forum: PULP General questions
Last Post: jsen_che11
11-27-2024, 07:41 AM
» Replies: 4
» Views: 1,900
i have some issue with si...
Forum: PULP General questions
Last Post: Garrett Gay
11-20-2024, 08:56 AM
» Replies: 3
» Views: 1,560
How to get more detailed ...
Forum: PULP General questions
Last Post: Santuckley
11-20-2024, 06:48 AM
» Replies: 4
» Views: 1,130
Some questions.
Forum: PULP General questions
Last Post: sungyong
11-12-2024, 03:31 PM
» Replies: 0
» Views: 304

 
  Doubts regarding I2S model and udma interface
Posted by: Zyb - 01-09-2025, 11:56 AM - Forum: PULP General questions - No Replies

Hi I would like to know about the i2s model and interface used in pulpissimo.Im using the I2s vip with the RTL at RTL github and the reference manual at  Doc .I had configured the i2s vip as master (using the i2c)that transmits the data and udma as slave to receive it.
Upon observation ,I noticed that :
The I2s vip  transmits data but starts the ws line after the first word.causing the udma i2s to only start receiving data from the second word (the first word is lost).Is this a problem with the i2s vip or due to design considerations involving the i2s protocol.

Some further doubts on :
1)What is the function of snap enable in the i2s vip .
2)How do I enable pdm mode in the i2s receiver udma side.There seems to be working registers for it and configuration wires for it but the documentation is not very clear.
Is it functional and can the i2s interface be configured to accept data in pdm mode?
Does it require only two lines ,the clk and data ?
Also the register documentation seems incomplete with a pdm enable bit that's not in the reference manual with regards to the i2s pdm setup register on page 91 of the manual.

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  Multi Core PULP first time setup
Posted by: Firasramadan - 12-25-2024, 05:53 PM - Forum: PULP General questions - Replies (1)

Hello all, 

Diring a research project we are planning on using the multi core pulp. We started digging and we have multiple questions and inquiries that we would appreciate your help for: 
1. Where can we find the most updated data for PULP ? The github repository was last updated 2 years ago (?) is this accurate ? Can we rely on that ? 
2. What are the simulation tools that were used and which version work for sure ? I saw alot of questions regarding this point but couldn’t find a decisive answer Smile 
3. In the future, we plane to go for tape-out. Are there any scripts that were used for Synthesis and Place-and-Route ? 
4. Benchmarking: other than the regression tests and simple tests that are available in the repository, is there any other platform or benchmarking guidelines for the multi core pulp ? Or should we build our benchmarks from scratch ? 
5. The SDKs in the repository seems to updated last time in 2019, is that okay ? Does work properly? 
6. Do you have a support for PLLs inside the core or the implementation of IO rings that we could get help from ? 


Your help is much much appreciated, 
Looking forward to hear from you. 

Best, 
Firas

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  Pulpissimo Support Group Discord
Posted by: Roogadget - 12-04-2024, 11:19 AM - Forum: PULP General questions - No Replies

Hi all,

I've created a discord for anyone interested in joining a working group to work on getting pulpissimo setup.

https://discord.gg/E2wFA9ub

We are also keen to speak to people using Pulpissimo to understand there issues and how they've overcome them.

Dave and Liam

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  some questions about pulpissimo L1 memory
Posted by: jsen_che11 - 11-25-2024, 02:16 PM - Forum: PULP General questions - Replies (3)

Hello, this is my first time working with PULPissimo for my research group’s project, and I’ve encountered some questions during its use:

  1. Why does PULPissimo seem to lack an L1 cache?
  2. If both data and instructions rely on the L2 cache for caching, wouldn’t that lead to potential conflicts?
Additionally, I’ve noticed that other PULP platforms seem to include an L1 cache. Could you explain the reasoning behind this design choice in PULPissimo? If there are any misunderstandings in my interpretation, I’d greatly appreciate it if you could point them out. Thank you very much!

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  Some questions.
Posted by: sungyong - 11-12-2024, 03:31 PM - Forum: PULP General questions - No Replies

what is meaning of CVA6(Ariane)? i think CVA6 is riscv 6 stage cpu?, and how about ariane?

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  what is meaning of ARA? (vector processor)
Posted by: sungyong - 11-11-2024, 02:00 AM - Forum: PULP General questions - Replies (2)

i have some simple question of the name of vector processor

what is the meaning of ARA? is it come from CVA6?(Ariane)

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  librbs.so not found (Pulpissimo)
Posted by: Roogadget - 11-04-2024, 03:01 PM - Forum: PULP General questions - Replies (1)

My team and I have moved back to the version from the pulp-training because we cannot get the newer tools to work.

Now we are faced with another issue.

When we go into the pulpissimo/sim and "make run"

There is an error 1 because it cannot find the librbs.so file.

What is this file? it is missing from the tb/remote_bitbang directory.

We are on Ubuntu 22.

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  Cheshire with two cores
Posted by: andlo47 - 10-30-2024, 06:26 AM - Forum: PULP General questions - Replies (1)

Hi all,

I'm trying to generate a bit file for Cheshire v0.1.0 with two cores for the Genesys2 board using Vivado 2023.2, but get an error stating that timing constraints are not met.
I can generate the bit file from an earlier commit, f316617, of the Cheshire repo. I did remove the USB support as it would not fit on the FPGA of Genesys2.

I'm quite new to this and would appreciate any help. I'm not sure where to start looking.

Regards,
/Andreas

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  Fatal error: Broken assembler - hello example
Posted by: Roogadget - 10-28-2024, 10:37 AM - Forum: PULP General questions - Replies (3)

I've just setup my pulpissimo environment and when i run the hello example, I get the following:

This is also a problem for another person I work with:

internal error: can't hash `pv.add.h.div2': exists
Assembler messages:
Fatal error: Broken assembler.  No assembly attempted.
make: *** [/home/x/Documents/code/pulpissimo/sw/pulp-runtime/rules/pulpos/default_rules.mk:257: /home/x/Documents/code/pulpissimo/sw/pulp-runtime/hello/build/test/test.o] Error 1

I tired to switch to the v1 sdk but the error is still there.

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  Pulp - make build
Posted by: Roogadget - 10-25-2024, 07:33 PM - Forum: PULP General questions - Replies (2)

I'm having trouble with the setup of just pulp, i followed the instructions from the website
but when i run make build, i get the following errors.

make[2]: *** [Makefile:87: librbs.so] Error 1
make[2]: Leaving directory '/home/vboxuser/Documents/pulp/rtl/tb/remote_bitbang'
make[1]: *** [Makefile:18: build-deps] Error 2
make[1]: Leaving directory '/home/vboxuser/Documents/pulp/sim'
make: *** [Makefile:124: build] Error 2



I have questasim, ubuntu 22.04 and installed the packages and compilers are instructed.
I've updated my bashrc with the expected exports too.

Resolved, please ignored. It was just an issue of loading the correct config.

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