Welcome, Guest
You have to register before you can post on our site.

Username
  

Password
  





Search Forums

(Advanced Search)

Forum Statistics
» Members: 726
» Latest member: triki
» Forum threads: 189
» Forum posts: 636

Full Statistics

Latest Threads
Is SYNTHESIS, ASIC_SYNTHE...
Forum: PULP General questions
Last Post: vignajeth
05-06-2021, 04:06 PM
» Replies: 0
» Views: 104
JTAG and Stimulifile
Forum: PULP General questions
Last Post: ufsahu
05-06-2021, 02:04 PM
» Replies: 0
» Views: 77
Printf Statements Breakin...
Forum: PULP General questions
Last Post: meggiman
05-04-2021, 04:19 PM
» Replies: 1
» Views: 208
Use of -nostdlib in pulp-...
Forum: PULP General questions
Last Post: stefanct
04-28-2021, 10:06 AM
» Replies: 0
» Views: 161
Optimized design "vopt_tb...
Forum: PULP General questions
Last Post: cyberbemon
04-26-2021, 07:00 AM
» Replies: 2
» Views: 277
Bitstream generation of N...
Forum: PULP General questions
Last Post: edjchg
04-25-2021, 04:40 PM
» Replies: 0
» Views: 144
Buid failed
Forum: PULP General questions
Last Post: kgf
04-13-2021, 07:07 AM
» Replies: 5
» Views: 4,092
Post Synthesis Simulation...
Forum: PULP General questions
Last Post: vignajeth
04-07-2021, 06:22 PM
» Replies: 2
» Views: 421
pwd for the image example
Forum: PULP General questions
Last Post: akurth
04-07-2021, 09:06 AM
» Replies: 1
» Views: 315
Queries in FPU for cv32e4...
Forum: PULP General questions
Last Post: mlmram
04-05-2021, 05:34 AM
» Replies: 3
» Views: 1,312

 
  Building an RTL simulation platform Error
Posted by: RiscV - 11-03-2020, 10:24 AM - Forum: PULP General questions - Replies (1)

Hi,
I followed the readme file of pulpissimo  for building an RTL simulation platform. After the following steps


Code:
source setup/vsim.sh

make build

I am getting error like this

Code:
make -C ../rtl/tb/remote_bitbang all
make[2]: Entering directory '/opt/pulpissimo/rtl/tb/remote_bitbang'
cc -MT remote_bitbang.o -MMD -MP -MF ./.d/remote_bitbang.Td -std=gnu11 -fno-strict-aliasing -Wall -Wextra -Wno-missing-field-initializers -Wno-unused-function -Wno-missing-braces -O2 -g -march=native -DENABLE_LOGGING -DNDEBUG -fPIC -I./  \
    -c  remote_bitbang.c -o remote_bitbang.o
ld -shared -E --exclude-libs ALL -o librbs.so  \
    remote_bitbang.o sim_jtag.o
make[2]: Leaving directory '/opt/pulpissimo/rtl/tb/remote_bitbang'
/opt/pulpissimo/sim//tcl_files/rtl_vopt.tcl
/usr/bin/env: ‘tclsh’: No such file or directory
Makefile:37: recipe for target 'opt' failed
make[1]: *** [opt] Error 127
make[1]: Leaving directory '/opt/pulpissimo/sim'
Makefile:47: recipe for target 'build' failed
make: *** [build] Error 2

 I am using ModelSim - Intel FPGA Edition 20.3 (includes Starter Edition).  Please help me ..
 

Print this item

  PULPissimo FLL bypass
Posted by: Supra - 10-30-2020, 03:33 PM - Forum: PULP General questions - Replies (5)

Hello everyone,
Could someone please help me bypass the FLL logic ? I want to use an external clock for my design.
At the moment, I have removed the gf22_FLL instances and tried to connect soc_clk and per_clk directly to ref_clk.
Could anyone please share their experience of bypassing the FLL ? How did you handle the rest of the logic present in soc_clk_rst_gen.sv file ?
With this, I get error captured in the attachment. 

Cheers



Attached Files Thumbnail(s)
   
Print this item

  Pulpissimo- errors during FPGA synthesis.
Posted by: plumerai - 09-25-2020, 04:23 PM - Forum: PULP General questions - Replies (2)

I am trying to synthesize Pulpissimo with Vivado 2019.2 for nexys A7-100. I get the following errors:

Code:
[Place 30-69] Instance i_pulpissimo/pad_frame_i/padinst_bootsel/iobuf_i/IBUF (IBUF driven by I/O terminal i_pulpissimo/pad_frame_i/padinst_bootsel/iobuf_i/IO) is unplaced after IO placer
[Place 30-68] Instance i_pulpissimo/pad_frame_i/padinst_bootsel/iobuf_i/IBUF (IBUF) is not placed
[Place 30-99] Placer failed with error: 'IO Clock Placer failed'
Please review all ERROR, CRITICAL WARNING, and WARNING messages during placement to understand the cause for failure.
[Common 17-69] Command failed: Placer could not place all instances


I didn't modify a bit after cloning the repo.

Print this item

  Adding custom instructions into RI5CY core
Posted by: plumerai - 09-25-2020, 09:04 AM - Forum: PULP General questions - Replies (4)

We are currently evaluating the RI5CY core for our project and the possibility of adding custom instructions is important for us. Some other cores (Sifive E31, Vexriscv) have simple and documented ways to do this, but I couldn't find the information about RI5CY. HWPEs are great but we may need a true custom instruction support for our needs.

Print this item

  FPGA: Printing UART on minicom possible?
Posted by: LPLA - 09-23-2020, 03:42 PM - Forum: PULP General questions - No Replies

Hello,

while looking at the pulp-rt-examples I found the uart examples and I was wondering if it's possible to print the contents of the buffer to minicom using the rt_uart_write function.
I have already tested the hello example on ZedBoard and the printf works just fine with minicom.
Now I was wondering if it's possible to write the same Hello! to minicom using the rt_uart_write function.
If I run the send example I don't get any output on minicom or in RTL simulation.
Same if I put a string in the buffer instead of the loop that is used in the example.
Shouldn't it be possible to get something on minicom with this method somehow?
I also played around with the RTS and CTS signals as i didn't want to have them float, even tho it worked with the normal hello example, but it didn't help with the above method.
Does anyone have any experience with this?

Edit: I managed to make it work. It was an issue in the code of the app I tried to run.

Thank you,
LPLA

Print this item

  Memset in the disassembly section
Posted by: RiscV - 09-11-2020, 12:09 PM - Forum: PULP General questions - Replies (5)

Hi,
I am trying to compile a simple code which has global arrays. I have initialized all the global arrays to make sure the compiler does not generate the code to initialize them to 0. However, I am still getting these "memset" calls in the _start section of the assembly.

Code:
Disassembly of section .text:

1c000000 <_start>:
1c000000:    00001197              auipc    gp,0x1
1c000004:    18018193              addi    gp,gp,384 # 1c001180 <__global_pointer$>
1c000008:    00001517              auipc    a0,0x1
1c00000c:    95850513              addi    a0,a0,-1704 # 1c000960 <__FRAME_END__>
1c000010:    00001617              auipc    a2,0x1
1c000014:    97060613              addi    a2,a2,-1680 # 1c000980 <completed.1>
1c000018:    40a60633              sub    a2,a2,a0
1c00001c:    00000593              li    a1,0
1c000020:    1a8000ef              jal    ra,1c0001c8 <memset>
1c000024:    00000517              auipc    a0,0x0
The program is not return to start section after executing till 1C0001f8

Code:
1c0001c8 <memset>:
1c0001c8:    00f00313              li    t1,15
1c0001cc:    00050713              mv    a4,a0
1c0001d0:    02c37e63              bgeu    t1,a2,1c00020c <memset+0x44>
1c0001d4:    00f77793              andi    a5,a4,15
1c0001d8:    0a079063              bnez    a5,1c000278 <memset+0xb0>
1c0001dc:    08059263              bnez    a1,1c000260 <memset+0x98>
1c0001e0:    ff067693              andi    a3,a2,-16
1c0001e4:    00f67613              andi    a2,a2,15
1c0001e8:    00e686b3              add    a3,a3,a4
1c0001ec:    00b72023              sw    a1,0(a4)
1c0001f0:    00b72223              sw    a1,4(a4)
1c0001f4:    00b72423              sw    a1,8(a4)
1c0001f8:    00b72623              sw    a1,12(a4)
1c0001fc:    01070713              addi    a4,a4,16
1c000200:    fed766e3              bltu    a4,a3,1c0001ec <memset+0x24>
1c000204:    00061463              bnez    a2,1c00020c <memset+0x44>

What should I do to load complete hex file to my verilator model? how can I get rid of this memset? I tried with
PHP Code:
-fno-zero-initialized-in-bss 
in my gcc, but not solved my issue. Currently using riscv gnu toolchain 10.1.0.

Print this item

  Error while building SDK
Posted by: Victor - 09-11-2020, 01:27 AM - Forum: PULP General questions - Replies (4)

Hello! I checked existing threads but did not find a solution for my problem. 
I've already installed simple runtime and executed expample "hello" successfully. 
While I was installing SDK, I had some problems. I just follow the steps in 
GitHub and run the "make build-pulp-sdk" and some errors just came out.


Environment:
CentOS-7
gcc 4.8.3
python 3.6.8

Following is some of the configuration in my ".bashrc". 
export PATH=$PATH:$HOME/mylib/v1.0.16-pulp-riscv-gcc-centos-7/:/tools/linux/mentor/modelsim/10.6a/modeltech/

I wrote this "source_pulp.sh" and source it once before I start building SDK.
PULP_HOME=$HOME/pulpissimo
export PULP_RISCV_GCC_TOOLCHAIN=$HOME/mylib/v1.0.16-pulp-riscv-gcc-centos-7
export VSIM_PATH=$PULP_HOME/sim
export CPLUS_INCLUDE_PATH=/usr/local/include/ImageMagick-6
source $PULP_HOME/pulp-runtime/configs/pulpissimo.sh
source $PULP_HOME/setup/vsim.sh
source $PULP_HOME/pulp-sdk/configs/pulpissimo.sh
source $PULP_HOME/pulp-sdk/configs/platform-rtl.sh


1. I've already installed configparser at /usr/local/lib/python3.6/site-packages.
   But "No module named configparser" shows up from time to time. Should I install 
   configparser with another method or just run several times to ignore the error?

2. I've installed ImageMagick at /usr/local/include. When I use ImageMagick-7 as
   the library, this error occurs.

      sdk:dpi-models:build: make build install
      make[2]: Entering directory `/users/student/mr109/cyyang20/pulpissimo/pulp-sdk/platform/dpi_models'
      make -C models build
      make[3]: Entering directory `/users/student/mr109/cyyang20/pulpissimo/pulp-sdk/platform/dpi_models/models'
      g++ camera/camera.cpp -o /users/student/mr109/cyyang20/pulpissimo/pulp-sdk/build/sdk/dpi-models/models/camera.so -I/usr/include/GraphicsMagick   -D__MAGICK__ -MMD -MP -O2 -g -fpic -std=c++11 -I/users/student/mr109/cyyang20/pulpissimo/pulp-sdk/pkg/sdk/dev/install/ws/include -Werror -Wfatal-errors -DMAGICKCORE_QUANTUM_DEPTH=16 -DMAGICKCORE_HDRI_ENABLE=0 -lGraphicsMagick++ -lGraphicsMagick -O2 -g -shared -L/users/student/mr109/cyyang20/pulpissimo/pulp-sdk/pkg/sdk/dev/install/ws/lib -Werror -Wfatal-errors
      camera/camera.cpp:82:3: error: 'PixelPacket' does not name a type
         PixelPacket *image_buffer;
         ^
      compilation terminated due to -Wfatal-errors.
      make[3]: *** [/users/student/mr109/cyyang20/pulpissimo/pulp-sdk/build/sdk/dpi-models/models/camera.so] Error 1
      make[3]: Leaving directory `/users/student/mr109/cyyang20/pulpissimo/pulp-sdk/platform/dpi_models/models'
      make[2]: *** [build] Error 2
      make[2]: Leaving directory `/users/student/mr109/cyyang20/pulpissimo/pulp-sdk/platform/dpi_models'
      Reached EOF with exit status 2
      FATAL ERROR: the command 'build' has failed
      make[1]: *** [all] Error 255
      make[1]: Leaving directory `/users/student/mr109/cyyang20/pulpissimo/pulp-sdk'
      make: *** [pulp-sdk] Error 2

   But after I choose ImageMagick-6 as the library, this error occurs.

      sdk:dpi-models:build: make build install
      make[2]: Entering directory `/users/student/mr109/cyyang20/pulpissimo/pulp-sdk/platform/dpi_models'
      make -C models build
      make[3]: Entering directory `/users/student/mr109/cyyang20/pulpissimo/pulp-sdk/platform/dpi_models/models'
      g++ camera/camera.cpp -o /users/student/mr109/cyyang20/pulpissimo/pulp-sdk/build/sdk/dpi-models/models/camera.so -I/usr/include/GraphicsMagick   -D__MAGICK__ -MMD -MP -O2 -g -fpic -std=c++11 -I/users/student/mr109/cyyang20/pulpissimo/pulp-sdk/pkg/sdk/dev/install/ws/include -Werror -Wfatal-errors -DMAGICKCORE_QUANTUM_DEPTH=16 -DMAGICKCORE_HDRI_ENABLE=0 -lGraphicsMagick++ -lGraphicsMagick -O2 -g -shared -L/users/student/mr109/cyyang20/pulpissimo/pulp-sdk/pkg/sdk/dev/install/ws/lib -Werror -Wfatal-errors
      In file included from /usr/include/GraphicsMagick/magick/render.h:14:0,
                     from /usr/include/GraphicsMagick/magick/draw.h:31,
                     from /usr/local/include/ImageMagick-6/magick/annotate.h:21,
                     from /usr/local/include/ImageMagick-6/magick/MagickCore.h:80,
                     from /usr/local/include/ImageMagick-6/Magick++/Include.h:45,
                     from /usr/local/include/ImageMagick-6/Magick++.h:10,
                     from camera/camera.cpp:24:
      /usr/include/GraphicsMagick/magick/type.h:87:21: error: 'MagickPassFail' does not name a type
      extern MagickExport MagickPassFail
                           ^
      compilation terminated due to -Wfatal-errors.
      make[3]: *** [/users/student/mr109/cyyang20/pulpissimo/pulp-sdk/build/sdk/dpi-models/models/camera.so] Error 1
      make[3]: Leaving directory `/users/student/mr109/cyyang20/pulpissimo/pulp-sdk/platform/dpi_models/models'
      make[2]: *** [build] Error 2
      make[2]: Leaving directory `/users/student/mr109/cyyang20/pulpissimo/pulp-sdk/platform/dpi_models'
      Reached EOF with exit status 2
      FATAL ERROR: the command 'build' has failed
      make[1]: *** [all] Error 255
      make[1]: Leaving directory `/users/student/mr109/cyyang20/pulpissimo/pulp-sdk'
      make: *** [pulp-sdk] Error 2

I would like to know whether I installed ImageMagick correctly. If there's 
anything needed to help me deal with these problems, please let me know! 
Thanks a lot!

Print this item

  Offloading APIs available on the HERO platform.
Posted by: Olivier - 08-27-2020, 01:18 PM - Forum: PULP General questions - Replies (1)

Hi,

I would like to run small home-made algorithms of languages other than c on the HERO platform.
Is offloading to bigPULP only possible with OpenMP or are other APIs implemented?

Thanks.

Print this item

  Access Stack Pointer in RiscV Pulp
Posted by: RiscV - 08-22-2020, 10:32 AM - Forum: PULP General questions - Replies (1)

Hi ,
I am trying  C to hex conversion for a simple (addition) program. My disassembly code is as follows:

Code:
00010000 <main>:
   10000:    fe010113              addi    sp,sp,-32
   10004:    00812e23              sw    s0,28(sp)
   10008:    02010413              addi    s0,sp,32
   1000c:    00a00793              li    a5,15
   10010:    fef42623              sw    a5,-20(s0)
   10014:    00500793              li    a5,5
   10018:    fef42423              sw    a5,-24(s0)
   1001c:    fec42703              lw    a4,-20(s0)
   10020:    fe842783              lw    a5,-24(s0)
   10024:    00f707b3              add    a5,a4,a5
   10028:    fef42223              sw    a5,-28(s0)
   1002c:    00000793              li    a5,0
   10030:    00078513              mv    a0,a5
   10034:    01c12403              lw    s0,28(sp)
   10038:    02010113              addi    sp,sp,32
   1003c:    00008067              ret

I used elf2hex for getting hex file. Hex files are generated successfully. I am using Riscv Pulppissimo testbench, and using readmemh for reading the generated hex file. My issue is after generating the .vcd file (gtkwave) I am not getting the result of addition. As per the disassembly section the result will go to the stack pointer, But how can I access SP in .vcd file.
In my vcd file regfile_alu_wdata loading the input values ie;5 and F but the result getting is 000102CE. I am getting the same result  for other input values too.......

Print this item

  Error while updating IPs
Posted by: LPLA - 08-19-2020, 12:34 PM - Forum: PULP General questions - Replies (3)

Hello,

yesterday I had an error while executing the ./update-ips command.

Code:
Updating ip 'apb_fll_if'...
Traceback (most recent call last):
 File "./update-ips", line 47, in <module>
   ipdb.update_ips()
 File "ipstools/ipstools/IPDatabase.py", line 525, in update_ips
ValueError: invalid literal for int() with base 10: b'

I don't know why I got this error because I didn't change anything on my system, in fact I didn't even use this particular computer at all in the last few weeks.


What I did was get a fresh PULPissimo installation.
So I cloned from the GitHub and updated the ips.
Everything worked fine and the error was gone.

Currently I am trying to generate the bitstream for the Zedboard.
So when I run make zedboard I get the following error:

Code:
ERROR: [Vivado 12-172] File or Directory '/local/lpla/pulpissimo/fpga/pulpissimo-zedboard/ips/xilinx_clk_mngr/ip/xilinx_clk_mngr.xci' does not exist

I then tried to update the ips again.
But now I get the same error again:

Code:
Updating ip 'apb_fll_if'...
Traceback (most recent call last):
 File "./update-ips", line 47, in <module>
   ipdb.update_ips()
 File "ipstools/ipstools/IPDatabase.py", line 525, in update_ips
ValueError: invalid literal for int() with base 10: b''

I have been trying to generate the bitstream for the Zedboard for a few days now but I run from one error into another.
As mentioned just yesterday I freshly pulled PULPissimo and updated the ips without any problems.
I didn't do pull anything else or manipulate any of the files or scripts.
Still I get the error again. Also it says that my local repo is already up-to-date.

Does anyone have an idea why this keeps happening?
All I'm trying to do is create the bitstream for the Zedboard following all the steps mentioned in the GitHub.

Edit: I just did a fresh install of PULPissimo again and this time it worked. Still it's weird that I got that error twice for no obvious reason. Maybe someone has an idea what happened...

Thank you,
LPLA

Print this item