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  GDB Debugging with JTAG on Ariane
Posted by: jthoma - 11-26-2019, 09:58 AM - Forum: PULP General questions - Replies (4)

Hi,

I have problems using the JTAG debugging connection with GDB for the Ariane Softcore. The Genesys 2 Board is connected to my PC via JTAG. I have OpenOCD with RISC-V support  installed on my machine and it seems to connect just fine:

Code:
~/Desktop/ariane $ openocd -f fpga/ariane.cfg
Open On-Chip Debugger 0.10.0+dev-00828-gde00906eb (2019-11-25-14:04)
Licensed under GNU GPL v2
For bug reports, read
       http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.
Info : clock speed 1000 kHz
Info : JTAG tap: riscv.cpu tap/device found: 0x00000001 (mfg: 0x000 (<invalid>), part: 0x0000, ver: 0x0)
Info : datacount=2 progbufsize=8
Info : Examined RISC-V core; found 1 harts
Info :  hart 0: XLEN=64, misa=0x800000000014112d
Info : Listening on port 3333 for gdb connections
Ready for Remote Connections
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : accepting 'gdb' connection on tcp/3333

This does look quite similar to the output in the Ariane git with the exception of this line:
Info : JTAG tap: riscv.cpu tap/device found: 0x00000001 (mfg: 0x000 (<invalid>), part: 0x0000, ver: 0x0)

I don't know whether this causes the problem or not gdb seems to connect just fine.

Okay, now to the actual problem. If I connect gdb and load the binary (a simple hello world), the PC points to _start. Unfortunately, _start contains loads of unimp instructions and does not redirect the program flow to the main function. Thus, if I do a continue, nothing happens. Same goes for break main etc. as the main function is apparently never called. See the GDB output below:

Code:
Reading symbols from ./out...
(gdb) target extended-remote :3333
Remote debugging using :3333
0x000000000001071c in _vfprintf_r ()
(gdb) load
Loading section .text, size 0xbd2c lma 0x100b0
Loading section .rodata, size 0xd08 lma 0x1bde0
Loading section .eh_frame, size 0x4 lma 0x1dae8
Loading section .init_array, size 0x10 lma 0x1daf0
Loading section .fini_array, size 0x8 lma 0x1db00
Loading section .data, size 0x1100 lma 0x1db08
Loading section .sdata, size 0x58 lma 0x1ec08
Start address 0x100c6, load size 56232
Transfer rate: 47 KB/sec, 5623 bytes/write.
(gdb) where
#0  0x00000000000100c6 in _start ()
(gdb) x/5i $pc
=> 0x100c6 <_start>:    unimp
  0x100c8 <_start+2>:  unimp
  0x100ca <_start+4>:  unimp
  0x100cc <_start+6>:  unimp
  0x100ce <_start+8>:  unimp
(gdb) cont
Continuing.

Interestingly, if I disassemble the _start function in a local GDB Session, it looks like this: 
Code:
(gdb) disassemble _start
Dump of assembler code for function _start:
  0x00000000000100c6 <+0>:     auipc   gp,0xe
  0x00000000000100ca <+4>:     addi    gp,gp,1066 # 0x1e4f0 <__malloc_av_+248>
  0x00000000000100ce <+8>:     addi    a0,gp,1904
  0x00000000000100d2 <+12>:    auipc   a2,0xf
  0x00000000000100d6 <+16>:    addi    a2,a2,-994 # 0x1ecf0
  0x00000000000100da <+20>:    sub     a2,a2,a0
  0x00000000000100dc <+22>:    li      a1,0
  0x00000000000100de <+24>:    jal     ra,0x1020c <memset>
  0x00000000000100e2 <+28>:    auipc   a0,0x9
  0x00000000000100e6 <+32>:    addi    a0,a0,-1238 # 0x18c0c <atexit>
  0x00000000000100ea <+36>:    beqz    a0,0x100f8 <_start+50>
  0x00000000000100ec <+38>:    auipc   a0,0x2
  0x00000000000100f0 <+42>:    addi    a0,a0,1108 # 0x12540 <__libc_fini_array>
  0x00000000000100f4 <+46>:    jal     ra,0x18c0c <atexit>
  0x00000000000100f8 <+50>:    jal     ra,0x101a2 <__libc_init_array>
  0x00000000000100fc <+54>:    lw      a0,0(sp)
  0x00000000000100fe <+56>:    addi    a1,sp,8
  0x0000000000010100 <+58>:    li      a2,0
  0x0000000000010102 <+60>:    jal     ra,0x1015c <main>
  0x0000000000010106 <+64>:    j       0x10184 <exit>

Am I missing something here? Do I need an extra GDB command to load the _start funtion or does it have to be compiled in a specific way? I compiled the binary with riscv64-unknown-elf-gcc test.c -o out and also tried adding -ffreestanding.

Thank you!
- Jan

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  HEX Files
Posted by: mahalakshmir.ma - 11-25-2019, 07:10 AM - Forum: PULP General questions - Replies (5)

Hi,

In PULPino environment there are some HEX Files getting generated while i tried to run testcase. So my query is where the conversion from C to HEX file is taking place (code & path). 

thanks in advance.


(11-25-2019, 07:10 AM)mahalakshmir.ma Wrote: Hi,

In PULPino environment there are some HEX Files getting generated while i tried to run testcase. So my query is where the conversion from C to HEX file is taking place (code & path). 

thanks in advance.

PULPino environment - https://github.com/pulp-platform/pulpino

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  questasim
Posted by: mahalakshmir.ma - 11-22-2019, 01:08 PM - Forum: PULP General questions - Replies (4)

hi,
 while simulating GPIO in questasim I am getting following error.
please tell me why this occurs and how to resolve it.


thankyou

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  PULPissimo Synthesis and Clock Distribution
Posted by: AhmedZaky - 11-20-2019, 06:55 AM - Forum: PULP General questions - Replies (1)

Hi all, 

First of all, thanks a lot for your help and support.

I was wondering if there is a synthesis - clean version of PULPissimo that's already released to the public. If not, is there any document / way to understand how the clock the distribution is going ? 

What I understand, correct me if I am wrong, that in the case of: 

1- FPGA, u r using a reference clock of 200 MHz to generate two internal clocks by divisions: A- Soc_clk = 20Mhz , B- periph_clk = 10Mhz.

2- In case of the RTL simulation, you r feeding from the TB a reference clock of ~ 32KHz and somehow, using DCO, FLL generating two clocks soc_clk = periph_clk = 17.5 MHz. 

If I am correct, are this on-chip clock generation modules synthesizable? Or they should be mapped to IPs in the PDK ? 

--------- 

Assuming that I want to drive the whole chip using the external clock, is it save to just remove all the " fll, DCO.. etc" modules and pass the signal through the modules to all the system components ? I mean the PAD_xtal_clk, pass it for the fc_subsystem, l2_memory .. etc and the system can work on that clock ? I already did simulation and it worked, but I am making sue that I didn't miss anything as I didn't test the system exhaustively. 

Thanks in advance.

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  Library Files
Posted by: mahalakshmir.ma - 11-15-2019, 10:19 AM - Forum: PULP General questions - Replies (6)

Hi,

I tried to include a new peripheral (PWM) into the PULPino environment, where can I get the library files for that peripheral or it will be auto generated.

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  Pulpissimo make error when making hello example
Posted by: bunohdwnl - 11-14-2019, 02:36 AM - Forum: PULP General questions - Replies (3)

Hello! I do the flow according to the Pulpissimo's README.md. But I meet a make error when I execute  the flow at the step "Downloading and running tests ".I change directory to  pulp-rt-examples/hello, and execute make clean all run ,then a "No Such File or Directory" error appears. I cat the Makefile,maybe the PULP_SDK_HOME is undefined. Do I need to set the PULP_SDK_HOME in my .bashrc  manually?

Code:
[jiaopy@localhost Jproject]$ cd pulp-rt-examples/hello/
[jiaopy@localhost hello]$ make clean all run
Makefile:6: /install/rules/pulp_rt.mk: No such file or directory
make: *** No rule to make target `/install/rules/pulp_rt.mk'.  Stop.
[jiaopy@localhost hello]$ cat Makefile
PULP_APP = test
PULP_APP_FC_SRCS = test.c
PULP_APP_HOST_SRCS = test.c
PULP_CFLAGS = -O3 -g
include $(PULP_SDK_HOME)/install/rules/pulp_rt.mk

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Question errors on building Linux cross-compiler
Posted by: mapletree - 11-12-2019, 09:16 PM - Forum: PULP General questions - Replies (5)

   
[attachment=15][attachment=15]
Hi,
I got some errors when build Linux cross-compiler with the following command:

Code:
./configure --prefix=/opt/riscv
make linux

The errors message is shown in the attached screenshot.
Anyone has an idea how to fix it?

Thanks!

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  Set defines of modules
Posted by: LPLA - 11-12-2019, 04:12 PM - Forum: PULP General questions - Replies (2)

Hello,

throughout the code you can find things like:

Code:
`ifdef QUENTIN_SCM
...
`endif

or

Code:
`ifndef PULP_FPGA_EMUL
...                              
`else
...
`endif

and there are two things about this that i just couldn't figure out.

First: Where are those defines? Let's say i want to use Quentin, where would i put `define QUENTIN_SCM (assuming this is the correct syntax).

Second: Assume i am having three different modules for multiplication mul1, mul2, mul3.
Every module has additional inputs if you want to do floating point multiplication.
This is handled by:
Code:
`ifdef FP_ENABLE
... (additional inputs)
`endif


I tested all three modules with Questasim using a testbench and created a .do file for them.
Now inside my .do file i have the following command:
Code:
set ms [concat mul1 mul2 mul3]
foreach m ${ms} {
  vlog -64 +define+FP_ENABLE ../multis/${m}/rtl/${m}.sv
}


If i now try to use my modules somewhere in PULPissimo i get some errors from my makefile that tell me some ports of the module are missing.
Basically the above command tells the modules mul1, mul2, mul3 that FP_ENABLE is defined and therefore the additional ports are instantiated.
Unfortunately i don't know how to use the same idea when trying to instantiate a mul-module in PULPissimo.
It is important to note that i don't want to change any line of code in the mul-modules!
Does anyone know a way how to tell the modules its defines just like the above command does?

Thank you.
LPLA

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  Ariane Performance Measures
Posted by: jthoma - 11-12-2019, 08:08 AM - Forum: PULP General questions - Replies (1)

Hi,

i am trying to do some performance measurements on the Ariane processor and therefore, I would like to use the cycle count from the RDCYCLE instruction. My code compiles fine, however, if I run it, I get a “illegal instruction” error. The following is the critical code snippet (both the CSRRS and RDCYCLE lead to the same error)


Code:
unsigned long get_clk(){
    unsigned long timer = 0;
    //__asm__ volatile("CSRRS %[result], cycle, x0\n\t" : [result]"=r"(timer)::);
    __asm__("RDCYCLE %[result]\n\t" : [result]"=r"(timer)::);
    return timer;
}

The RISC-V “Instruction Set Manual II: Privileged Architecture” states that the cycle CSR entry should be readable from user mode. I figured that this might not be the case in Ariane which would be fine if I could get to supervisor mode somehow. I looked into writing a kernel module that would give me access to the performance measures. Unfortunately, this turned out to be quite challenging since I can neither compile code on the FGPA nor use insmod to install my kernel module. Is there an easy way to get access to the cycle timer?

Thank you!

Jan

-- Edit: The same happens if I just use the built-in C time() function...

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  configparser module error when installing Pulpissimo SDK
Posted by: jmmarostegui - 10-28-2019, 01:50 PM - Forum: PULP General questions - Replies (9)

I have tried to install the Pulpissimo SDK, but without success. I have searched in the Forum for a similar problem, but I couldn't find it. Therefore, I'm posting here the sequence of commands I'm issuing and the final result. Any help will be appreciated.

I'm working on a clean Linux 16.04.06 Install. Following the information available in GitHub, here is the sequence I'm following:

1 - sudo apt install git python3-pip gawk texinfo libgmp-dev libmpfr-dev libmpc-dev swig3.0 libjpeg-dev lsb-core doxygen python-sphinx sox graphicsmagick-libmagick-dev-compat libsdl2-dev libswitch-perl libftdi1-dev cmake scons libsndfile1-dev

2 - sudo pip3 install twisted prettytable pyelftools openpyxl xlsxwriter pyyaml numpy configparser pyvcd

3 - sudo pip3 install configparser

4 - cd /opt

5 - sudo mkdir riscv

6 - cd riscv

7 - git clone https://github.com/pulp-platform/pulp-ri...-toolchain

8 - cd pulp-riscv-gnu-toolchain

9 - git submodule update --init --recursive

10 - sudo apt-get install autoconf automake autotools-dev curl libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libtool patchutils bc zlib1g-dev

11 - sudo ./configure --prefix=/opt/riscv --with-arch=rv32imc --with-cmodel=medlow --enable-multilib

12 - make

13 - export PULP_RISCV_GCC_TOOLCHAIN=‘/opt/riscv’

14 - cd /opt/riscv

15 - sudo git clone https://github.com/pulp-platform/pulp-builder.git

16 - cd pulp-builder

17 - source configs/pulpissimo.sh

18 - sudo ./scripts/build-gvsoc

This last command fails with the following error:

...
make: Entering directory '/opt/riscv/pulp-builder/archi'
scons
scons: Reading SConscript files ...
ImportError: No module named configparser:
  File "/opt/riscv/pulp-builder/archi/SConstruct", line 4:
    import pulp_config as plpconfig
  File "/opt/riscv/pulp-builder/install/ws/python/pulp_config.py", line 23:
    import configparser
Makefile:2: recipe for target 'build' failed
make: *** [build] Error 2
make: Leaving directory '/opt/riscv/pulp-builder/archi'

I get exactly the same result if, instead of command 18 i issues the following three commands:

./scripts/clean
./scripts/update-runtime
./scripts/build-runtime

Since module configparser was apparently installed in step 3 I don't know what may be wrong.

Thank you very much in advance for your help.

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