The photos from the RISC-V workshop and WOSH tutorials can be found here.
PULP Features
- efficient implementations of RISC-V cores. These include:
- 32 bit 4-stage core RI5CY
- 64 bit 6-stage Ariane
- 32-bit 2-stage Ibex (formerly Zero-riscy)
- complete systems based on:
- single-core micro-controllers (PULPissimo, PULPino)
- multi-core IoT Processors (OpenPULP)
- multi-cluster heterogeneous accelerators (Hero)
- open-source SolderPad license
- a perpetual, worldwide, non-exclusive, no-charge, royalty-free, irrevocable license
- rich set of peripherals
- I2C, SPI, HyperRAM, GPIO
Do you use PULP?
Does your company or institution use PULP? Please, let us know via email info@pulp-platform.org or send us a direct message on Twitter. We would love to expand our user list.
Meet our mascot
This is PULP's mascot, Alex, The Bear. He accompanies us to most of the events and he will be very happy to have a picture with you.
Alex The Bear
Latest news New
12 June 2019
Our PULP RI5CY has been proposed as a reference core for EmBench,
a benchmark for embedded processors initiated by David A. Patterson. Learn more.
6 June 2019
OpenHW Group, a new not-for-profit global organization to boost the adoption of open-source processors, has been founded and PULP is part of it!
Read more about this strategic alliance here.
Development boards
The following companies sell development boards with chips based on our PULP system:- GreenWaves sells a development board of their GAP8 chip.
- open-isa.org sells their RV32M1-VEGA development board.
- AI Deck is a collaborative product of GreenWaves, BitCraze and ETH Zurich based on the PULP-shield.
Support
Do you need help with PULP?
We have started an Online Forum. Please register and ask your question. Discussions on individual GitHub pages or the following links might be helpful, as well: