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  Error connect openocd to debug pulpissimo
Posted by: Steven_drarker - 10-24-2023, 11:43 AM - Forum: PULP General questions - No Replies

tôi đang thực hiện SoC dự án Pulissimo trên FPGA. Tôi sử dụng Zedboard. Tôi đã gặp lỗi khi cố gắng sử dụng openocd để conig jtag để gỡ lỗi. Hãy làm theo hướng dẫn trong readme https://github.com/pulp-platform/pulpiss...nd-openocd
Tôi git sao chép và thực thi các lệnh sau xây dựng

bản sao openocd $git https://github.com/pulp-platform/riscv-openocd

$ ./bootstrap
$ ./config --enable-ftdi
$ ./make
$ ./make cài đặt


sau đó tôi sử dụng lệnh để kết nối riscv lõi với máy chủ
$ openocd -f openocd-zedboard-ftdi2232.cfg
Tôi nhận được mã lỗi sau:
Mở Trình gỡ lỗi trên chip 0.10.0+dev-00830-ga88cc98a0 (24-10-10-2023) 16:32)

Được cấp phép theo GNU GPL v2
Đối với các báo cáo lỗi, hãy đọc
http://openocd.org/doc/doxygen/bugs.html
Thông tin: Nghe trên cổng 6666 cho kết nối tcl
Thông tin: Nghe trên cổng 4444 cho kết nối telnet
Thông tin: tốc độ xung nhịp 1000 kHz
Cảnh báo: Không có thao tác nhấn nào được kích hoạt. TỰ ĐỘNG THĂM DÒ CÓ THỂ KHÔNG HOẠT ĐỘNG!!
Lỗi: Việc thẩm vấn chuỗi quét JTAG không thành công: tất cả đều là lỗi
Lỗi: Kiểm tra giao diện JTAG, thời gian, công suất mục tiêu, v.v.
Lỗi: Vẫn cố gắng sử dụng chuỗi quét đã định cấu hình...
Cảnh báo: Bỏ qua các sự kiện thiết lập JTAG do lỗi
Cảnh báo: dịch vụ gdb cần xác định một hoặc nhiều mục tiêu


Sau đó tôi chuyển sang một FPGA khác. cụ thể là kintex kc705. Tôi lại nhận được lỗi sau:
Mở Trình gỡ lỗi trên chip 0.10.0+dev-00830-ga88cc98a0 (2023-10-24-16:32)

Được cấp phép theo GNU GPL v2
Đối với các báo cáo lỗi, hãy đọc
http://openocd.org/doc/doxygen/bugs.html
openocd-kc705.cfg:21: Lỗi: tên lệnh không hợp lệ "ftdi"
trong thủ tục 'script'
tại tệp "embeddedConfusedtartup.tcl", dòng 26
tại tệp "openocd-kc705.cfg", dòng 21


Cách định cấu hình bột giấy gỡ lỗi openocd khi được triển khai trên FPGA. Và tôi muốn triển khai Pulissimo xuống Kintex 7 KC705 FPGA. Tôi có thể làm được không? tôi đang gặp rắc rối

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  Pulp FreeRTOs Debug
Posted by: costola - 10-24-2023, 10:14 AM - Forum: PULP General questions - Replies (2)

I am running a project with pulp-freertos and all the related tools needed to make it run (sdk and riscv toolchain). I am personalizing the 'blink' demo project already present in the github dir project, but I need to debug it. Now the question is...how can I debug it?
Thanks in advance

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  SPI Master
Posted by: istillaga - 10-19-2023, 08:34 AM - Forum: PULP General questions - Replies (2)

Hello i'm using Pulpino's SPI Master part to read a external sensor  that it is connected to one of the zedboard's pmod. I have configurated the spi_master_clkgen spi_clk polarity to start in 1. I have done the next code to read the sensor's id but I don't get any success:

#include <utils.h>
#include <stdio.h>
#include <spi.h>
#include <bench.h>
int main() {
    
  int sensor_id; 
    
    spi_setup_master(1);
  *(volatile int*) (SPI_REG_CLKDIV) = 0x2;


    spi_setup_cmd_addr( 0x0f, 8,0,0); 
    spi_set_datalen(8);
    spi_start_transaction(SPI_CMD_RD, SPI_CSN0);
    spi_read_fifo(&sensor_id, 8);
    printf(" LPS25HB sensor id: 0x%x\n", sensor_id);
    return 0;
}

Reviewing the signal with a logic a analizer I got this result: SCLK does as many clocks that spi_Reg_clkdiv value is, the chip select when CS is asserted, it remains asserted indefinitely. MOSI only does one pulse and MISO remains idle.

Anyone can help?

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  What is slm_conv-0.3 in HERO?
Posted by: ajgaspar - 09-08-2023, 06:08 PM - Forum: PULP General questions - Replies (3)

I'm trying to build the HERO project, and I am on the step where I am meant to run " ../test/gen_slm_files.sh <app_name>."
However, I have an issue with line 11 of the file, which is 

Code:
slm_conv=~andkurt/bin/slm_conv-0.3
When I try running the command, I am told that the directory above does not exist. "~andkurt" is obviously the creator's home directory, but what is slm_conv-0.3 and how can I install it? There's nothing in the github repo mentioning it, and I haven't found it referenced anywhere else on the PULP platform. Even on google I haven't found a relevant result.

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  HERO: Compiling OpenMP examples with only=pulp
Posted by: darbyshaw - 08-30-2023, 09:08 AM - Forum: PULP General questions - No Replies

Hello,

I am trying to compile the mm-small example in https://github.com/pulp-platform/hero/tr...s/mm-small. I would like to build it only for the PULP accelerator.
For that I run make only=pulp. I get the following error:

herov2/pulp/sdk/pkg/sdk/dev/install/include/archi/pulp.h:31:10: fatal error: 'archi/chips/PULP_CHIP_STR/pulp.h' file not found

Please could you help me identify the source of the problem.

Thank you!

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  Occamy Verilator simulation error
Posted by: pquanganh3105 - 06-14-2023, 03:24 AM - Forum: PULP General questions - Replies (2)

Dear sir,

I follow this instruction about Occamy: https://github.com/pulp-platform/snitch/...tem/occamy

However, when I ran command: make bin/occamy_top.vlt, I met this error:

%Error-PKGNODECL: occamy/snitch/hw/vendor/openhwgroup_cva6/core/include/ariane_rvfi_pkg.sv:20:17: Package/class 'riscv' not found, and needs to be predeclared (IEEE 1800-2017 26.3)

I recognize that your work-vlt/files lacks included file (it doesn't have snitch/hw/vendor/openhwgroup_cva6/core/include/riscv_pkg.sv so the simulator can not find package 'riscv') but whenever I ran the command above, work-vlt/files is automatically generated and it still remain lacking information.

How can fix that?

Many thanks

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  boot from external flash on genesys2 fpga
Posted by: a0000442 - 06-10-2023, 01:53 AM - Forum: PULP General questions - No Replies

hi
Can anyone tell me how to boot from external flash on geneysy2 fpga board in detail?
I use pulpissimo 7.0.0 and genesys2 fpga board.I can download app through openocd but
I cannot boot it from external flash.
I konw the step how to boot from flash
1. set the bootsel=2b00;
2. modify the bootrom.c in boot_code 
3. make and convert bootrom.c to fpga_bootrom.sv
4. rerun the fpga process and burn it
5. use plp_mkflash to convert app to flash.bin
6. burn flash.bin to external flash 
7.reset fpga and run app in flash
is it correct?
can anybody help me?how to modify bootrom.c in step2?

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  plp_mkflash cannot run
Posted by: a0000442 - 06-09-2023, 03:07 PM - Forum: PULP General questions - No Replies

When I use plp_mkflash in pulp-sdk/tools/runner/bin to make
flash.bin, the plp_mlflash tools display there is no module named “runner”
How can I solve it? I have build sdk successful.


I have download prebuilt pulp-sdk for Ubuntu 16 in GitHub and run the plp_mkflash tool.
It also cannot run and display no module named “runner”,what’s the matter with it?
help me! Sad

m



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  Error building pulp sdk
Posted by: costola - 05-18-2023, 08:21 AM - Forum: PULP General questions - No Replies

I am stacked in installing the pulp-sdk.
First of all I have succesfully installed the pulp-rsicv-gnu-toolchain following the instruction on github https://github.com/pulp-platform/pulp-ri...-toolchain .
I performed the following step (I omit the part in which I install all the dependencies) :

1. $ git clone --recursive https://github.com/pulp-platform/pulp-ri...-toolchain

2. $ cd pulp-riscv-gnu-toolchain

3. $ export PATH=/opt/riscv/bin:$PATH

4. $ ./configure --prefix=/opt/riscv --with-arch=rv32imc --with-cmodel=medlow --
enable-multilib

5. $ make

Then I followed the instruction on github for what concern pulp-sdk https://github.com/pulp-platform/pulp-sdk .
I performed the following step (I omit the part in which I install all the dependencies) :

1. $ git clone https://github.com/pulp-platform/pulp-sdk

2. $ export PULP_RISCV_GCC_TOOLCHAIN=/opt/riscv

3. $ cd pulp-sdk

4. $ source configs/pulp-open.sh

5. $ make build

At step n°5 i have the following error:

Quote:cmake -S . -B build -DCMAKE_BUILD_TYPE=RelWithDebInfo \

-DCMAKE_INSTALL_PREFIX=/home/luca/Desktop/Tesi/pulp-sdk/install/workstation \
-DGVSOC_MODULES="/home/luca/Desktop/Tesi/pulp-sdk/tools/gvsoc/common;/home/luca/Desktop/Tesi/pulp-sdk/tools/gvsoc/pulp" \
-DGVSOC_TARGETS=pulp-open
Re-run cmake no build system arguments
CMake Error: The source directory "/home/luca/Desktop/Tesi/pulp-sdk/build" does not exist.
Specify --help for usage, or press the help button on the CMake GUI.
Makefile:26: recipe for target 'build' failed
make: *** [build] Error 1

How can i solve ? It seems the build folder is missing.
I also checked this step by step installation guide https://www.pulp-platform.org/docs/pulp_..._part1.pdf

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  simulation qspi in FPGA
Posted by: HaiAnhWavelet - 05-10-2023, 09:32 AM - Forum: PULP General questions - Replies (1)

Hi, I'm trying run some tests about qspi in Genesy 2 broad but I have some problems. When run simulation with flash model, everything is good so I program it to my Kit. In genesys 2 have a qspi flash so I want to use it like a peripheral. In this reference, signals of qspi can connect via port in XDC file, expect qspi_sck. It must be connected via STARTUPE2. When I do so, it runs incorrectly. My test run through all code line but wave form in ocilloscope is different from Questasim.  Have anyone met this problem like that before?
Thanks

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