Hi,
I notice in a lot of places in the entire pulpisismo code that contains ifndef depending upon the flag SYNTHESIS, I also notice ASIC_SYNTHESIS flag being used inside the Ri5cy.
I also find PULP_TRAINING flag in the code
Example in soc_peripherals.sv
`ifdef PULP_TRAINING
`ifndef SYNTHESIS
apb_dummy_registers #(.APB_ADDR_WIDTH(APB_ADDR_WIDTH)) i_apb_dummy_reg_unit (
.HCLK ( clk_i ),
.HRESETn ( rst_ni ),
.PADDR ( s_apb_dummy_bus.paddr ),
.PWDATA ( s_apb_dummy_bus.pwdata ),
.PWRITE ( s_apb_dummy_bus.pwrite ),
.PSEL ( s_apb_dummy_bus.psel ),
.PENABLE ( s_apb_dummy_bus.penable ),
.PRDATA ( s_apb_dummy_bus.prdata ),
.PREADY ( s_apb_dummy_bus.pready ),
.PSLVERR ( s_apb_dummy_bus.pslverr )
);
`endif
`endif
should these flags be passed through the synthesis as a macro ?
I notice in a lot of places in the entire pulpisismo code that contains ifndef depending upon the flag SYNTHESIS, I also notice ASIC_SYNTHESIS flag being used inside the Ri5cy.
I also find PULP_TRAINING flag in the code
Example in soc_peripherals.sv
`ifdef PULP_TRAINING
`ifndef SYNTHESIS
apb_dummy_registers #(.APB_ADDR_WIDTH(APB_ADDR_WIDTH)) i_apb_dummy_reg_unit (
.HCLK ( clk_i ),
.HRESETn ( rst_ni ),
.PADDR ( s_apb_dummy_bus.paddr ),
.PWDATA ( s_apb_dummy_bus.pwdata ),
.PWRITE ( s_apb_dummy_bus.pwrite ),
.PSEL ( s_apb_dummy_bus.psel ),
.PENABLE ( s_apb_dummy_bus.penable ),
.PRDATA ( s_apb_dummy_bus.prdata ),
.PREADY ( s_apb_dummy_bus.pready ),
.PSLVERR ( s_apb_dummy_bus.pslverr )
);
`endif
`endif
should these flags be passed through the synthesis as a macro ?