2 JTAG modules in pulpissimo

[nixie2002]

Hello.

In Pulpissimo, there are 2 JTAG modules - dmi_jtag, dm_top / jtag_tap_top & lint_jtag_wrap (pulp_soc.sv).

I guess dmi_jtag & dm_top are from RISC-V Debug Specification,
and jtag_tap_top & lint_jtag_wrap are sub-module of adv_dbg_if.

In Pulpino, zero-riscy core, whose registers are memory-mapped, uses adv_dbg_if as a debug module.
But ibex core at Pulpissimo follows the RISC-V Debug Specification and has no debug interface except one bit debug signal.


So, I don't know why lint_jtag_wrap still necessary in Pulpissimo.
(Any limitations for dm_top to access system bus ??)


Thanks.

[bluewww]

dmi_jtag is a RISC-V debug compliant JTAG TAP (Test Access Port). This means software commercial tools but also free software such as OpenOCD can provide debugging support by only supporting the RISC-V standard (instead of having PULPissimo specific code)  thanks to the common interface. We do support full system bus access to the whole address space so there no limits per se.

The PULP TAP (jtag_top_top) is as you said the "legacy" debug solution. It is still there to provide much faster access to the internal bus (especially for writes to L2) because it supports a custom JTAG burst mode. This is in fact the only thing it is used for in PULPissimo. For example, this burst mode considerably speeds up simulation (because loading a binary into L2 is slow in general). You can try it out yourself: in the PUPissimo testbench there is a parameter you can change to use the RISC-V system bus access to load your binary.

[nixie2002]

dmi_jtag is a RISC-V debug compliant JTAG TAP (Test Access Port). This means software commercial tools but also free software such as OpenOCD can provide debugging support by only supporting the RISC-V standard (instead of having PULPissimo specific code)  thanks to the common interface. We do support full system bus access to the whole address space so there no limits per se.

The PULP TAP (jtag_top_top) is as you said the "legacy" debug solution. It is still there to provide much faster access to the internal bus (especially for writes to L2) because it supports a custom JTAG burst mode. This is in fact the only thing it is used for in PULPissimo. For example, this burst mode considerably speeds up simulation (because loading a binary into L2 is slow in general). You can try it out yourself: in the PUPissimo testbench there is a parameter you can change to use the RISC-V system bus access to load your binary.

Thanks for your reply.

Then except JTAG burst mode, dmi_jtag has no limitation to access the whole address space.
I'll check PUPissimo testbench.