11-19-2018, 09:20 AM
Hello,
For these please follow the instructions on the GitHub page of PULPissimo
https://github.com/pulp-platform/pulpissimo
As explained there if you have the PULP SDK configured, you can set the configuration so that it will run your program on either a virtual platform, an RTL simulation, implementation on FPGA or an implementation on an ASIC. The latter depend on the availability of the systems we have released.
https://github.com/pulp-platform/pulp-sd.../README.md
If you are developing your own ports for FPGAs, the basic idea is to use the JTAG port to download the program. The JTAG port allows you to write to (and read from) every memory address, there are various examples in our other ports to see how it is working.
For these please follow the instructions on the GitHub page of PULPissimo
https://github.com/pulp-platform/pulpissimo
As explained there if you have the PULP SDK configured, you can set the configuration so that it will run your program on either a virtual platform, an RTL simulation, implementation on FPGA or an implementation on an ASIC. The latter depend on the availability of the systems we have released.
https://github.com/pulp-platform/pulp-sd.../README.md
If you are developing your own ports for FPGAs, the basic idea is to use the JTAG port to download the program. The JTAG port allows you to write to (and read from) every memory address, there are various examples in our other ports to see how it is working.
Visit pulp-platform.org and follow us on twitter @pulp_platform