01-08-2021, 01:40 PM
(01-06-2021, 04:02 PM)andrea.spitale Wrote:(01-06-2021, 03:58 PM)LarsKeuninckx Wrote: I found a way around this, but it is messy and not sure what other problems this causes. In the offending file pulpissimo/ips/riscv/rtl/riscv_ex_stage.sv, change line 445 from:Hi, Thank you for sharing your experience! I am using vivado 2020.1 as well. Did you find any other error after changing that line?
'{default: C_DIV}, // DIVSQRT
to:
'{default: fpnew_pkg::MERGED}, // DIVSQRT
As far as I can tell (?) this is related to the instantation of the FP unit. Note that the error described above happened even when synthesis is done for the (non-FP) Ibex core, as described by taking the 'Core Selection' steps in https://github.com/pulp-platform/pulpiss...l-platform.
Possibly, the version of Vivado is causing this error. As described in the README.md, Vivado v2018.3 was used. Whereas, the error appeared for me with Vivado v2020.1.
You're welcome. After changing above line, it compiled without error, resulting in .bit and .bin files. Now I am trying to make it work for the Digilent ARTY-A7-100T board, as that is the board I have.