PULPissimo FLL bypass
#7
Hi, 

I'm having the same problem of trying to disable the FLLs. I think my situation is the same as in this thread but I'll explain it just to be sure. 

I'm trying to disable the FLLs so that I can use external clocks for the core and peripheral domains. I created two more PADs to input clocks and assigned them to the outputs in the soc_clk_rst_gen.sv module. I used the same frequency used in the normal configuration, but as soon as I comment the FLLs the simulation just runs and the program doesn't work. 
I tried with the hello example and after the "Waiting for end of computation" I don't see the signal on the PADs nor in the transcript (btw I used argument io=uart when running the simulation so I should see it in the PADs too). The simulation also doesn't break, it just runs even faster as if there is nothing to really compute.

I tried to edit the init.c file in pulp-sdk, but I'm not sure how to build the sdk, because if I ran "make build-pulp-sdk" in the top directory it would clone the pulp-sdk folder overwriting the init.c file changes right? And I tried running the "make build" command as I'm not sure if it would apply the changes in the SDK, but it didn't solve the problem.

Am I missing something on how to properly build the SDK? 

Thanks in advance.
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Messages In This Thread
PULPissimo FLL bypass - by Supra - 10-30-2020, 03:33 PM
RE: PULPissimo FLL bypass - by heavySea - 11-02-2020, 07:38 AM
RE: PULPissimo FLL bypass - by Supra - 11-02-2020, 03:37 PM
RE: PULPissimo FLL bypass - by heavySea - 11-02-2020, 05:16 PM
RE: PULPissimo FLL bypass - by Supra - 11-02-2020, 08:41 PM
RE: PULPissimo FLL bypass - by Supra - 11-06-2020, 09:34 AM
RE: PULPissimo FLL bypass - by ivanhira - 06-03-2022, 07:23 PM
RE: PULPissimo FLL bypass - by Happybug - 02-06-2023, 02:00 PM

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