Is there any RTL generator for pulp platform?
#2
Hello,

Yes, PULP is developed and maintained as a SystemVerilog based code-base. While this may look daunting for newcomers, it is a more natural environment for hardware developers. Of course this may not be for everyone, and therefore several different projects have been developed (outside of PULP) supporting different approaches including chisel from UC Berkeley. Fell free to explore these if SystemVerilog is not your thing.

Cheers
KGF
Visit pulp-platform.org and follow us on twitter @pulp_platform
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RE: Is there any RTL generator for pulp platform? - by kgf - 06-04-2024, 07:28 AM

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