GDB Debugging with JTAG on Ariane
#2
You are loading your code into a physical address that is not writable. If you want to run bare-metal applications you should fix your binary to start at 0x8000000 or higher (DRAM range). The easiest way to do that is by providing a linker file (linker.lds) to the linker:
Code:
riscv64-unknown-elf-gcc main.c -Tlinker.lds -o main.o

The linker file could look like the file in fpga/src/bootrom/linker.lds:

Code:
ENTRY(main)

SECTIONS
{
   // I changed this to the DRAM start addr (0x80000000)
   ROM_BASE = 0x80000000; /* ... but actually position independent */

   . = ROM_BASE;

   .text.init : { *(.text.init) }

   .text : ALIGN(0x100) {
   _TEXT_START_ = .;
       *(.text)
   _TEXT_END_ = .;
   }

   .data : ALIGN(0x100) {
   _DATA_START_ = .;
       *(.data)
   _DATA_END_ = .;
   }

   PROVIDE(_data = ADDR(.data));
   PROVIDE(_data_lma = LOADADDR(.data));
   PROVIDE(_edata = .);

   .bss : ALIGN(0x100) {
   _BSS_START_ = .;
       *(.bss)
   _BSS_END_ = .;
   }

   .rodata : ALIGN(0x100) {
   _RODATA_START_ = .;
       *(.rodata)
       *(.dtb*)
       *(.rodata*)
   _RODATA_END_ = .;
   }
}
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Messages In This Thread
GDB Debugging with JTAG on Ariane - by jthoma - 11-26-2019, 09:58 AM
RE: GDB Debugging with JTAG on Ariane - by scmoritz - 11-26-2019, 12:16 PM
RE: GDB Debugging with JTAG on Ariane - by jthoma - 11-26-2019, 02:59 PM
RE: GDB Debugging with JTAG on Ariane - by jthoma - 11-27-2019, 02:12 PM

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