04-23-2020, 06:37 PM
There is axi bus in pulp_soc that goes axi_slice_dc_slave_wrap - soc_interconnect.
We removed axi_slice_dc_slave_wrap and routed our axi lite slave to the s_data_out_bus.
From C we managed write and read to the 4 registers and confirm that the our component did process the data.
If we were to use full axi is there some register or some way to control the burst and confirm that slave got the data in C?
We removed axi_slice_dc_slave_wrap and routed our axi lite slave to the s_data_out_bus.
From C we managed write and read to the 4 registers and confirm that the our component did process the data.
If we were to use full axi is there some register or some way to control the burst and confirm that slave got the data in C?
Code:
#define REG_COUNT 4
uint32_t *AXI_START = 0x10000000;
int main(void)
{
for(int i = 0; i < REG_COUNT; i++) {
AXI_START[i] = 0xff00ff00;
}
for(int i = 0; i < REG_COUNT; i++) {
printf("%08x\t", AXI_START[i]);
}
return 0;
}