Post Synthesis Simulation in ASIC
#3
Hi kgf,
Thanks for your reply. One more question I have is,

Can you tell the steps to build the synthesized netlist?

The synthesized netlist needs to be formed as a lib with the use of tech libraries to be able to run in ModelSim.

I have added the TECH_LIBS in /sim/tcl_files/rtl_vopt.tcl but it throws an error as

Error: ../rtl/tb/tb_pulp.sv(541): Module 'pulpissimo' is not defined.
Reply


Messages In This Thread
Post Synthesis Simulation in ASIC - by vignajeth - 04-07-2021, 12:23 PM
RE: Post Synthesis Simulation in ASIC - by kgf - 04-07-2021, 12:34 PM
RE: Post Synthesis Simulation in ASIC - by vignajeth - 04-07-2021, 06:22 PM

Forum Jump:


Users browsing this thread: 1 Guest(s)