Where is the "get started" documentation?
Hi, kgf,
About the instruction cache, I have a few questions. It seems there are some repositories in the github(icache_private, cluster_peripherals/icache_ctrl_unit, icahe_mp_128_pf, icache-intc, hier-icache...)
Some of them might be deprecated or not well documented. So if I try to use one of them, which one to choose?
are there any SoC(pulpissimo, pulpino) use one the these implementations? Any more document to read?

(01-17-2019, 02:04 PM)kgf Wrote: Hello,

The memory system is not that exciting actually. The drawing on the GitHub page is actually pretty accurate. There is no real 'memory hierarchy' it is assumed that all the memory in the PULPissimo system is (relatively) small. A multi banked memory (Tightly Coupled Data Memory == TCDM) is connected to the requesting systems cores (one for data one for instruction), accelerators, DMA engine and JTAG through the logarithmic interconnect that does arbitration of the requests. In most cases accesses will be to different banks and all requests can be handled in parallel. So all devices that access memory should be stallable (in case they do not get access to the memory) and in the best case (no conflicts) all memory accesses will be handled with single cycle latency. 

In Arnold for example the TCDM is 512 kByte and there are 16 banks of memory cuts. The core has a tiny buffer (typically 1 word) for the instructions (to handle compressed instructions) if really needed an instruction cache could be connected to it as well, we do not use it, and it is not part of the PULPissimo distribution.

Does that answer the question?

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RE: Where is the "get started" documentation? - by DavidL - 12-29-2020, 07:35 AM

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