The pulpino verification

[eureka]

Hello! I'm a student who is learning the riscv arch and the pulpino core, and I wonder how the team of pulpino verify the RV32IM instruction set and the custome instruction set, are your team use the official riscv-tests, or use riscv emulators like qemu or spike as ref, or build your own test sets.

Thank you very much!

[kgf]

Hello! I'm a student who is learning the riscv arch and the pulpino core, and I wonder how the team of pulpino verify the RV32IM instruction set and the custome instruction set, are your team use the official riscv-tests, or use riscv emulators like qemu or spike as ref, or build your own test sets.

Thank you very much!

Hello,

Pulpino is the name of the complete system, that surrounds the RISC-V core (in this case CV32E40P aka RI5CY) and adds peripherals and a memory subsystem. It was our first release, and for many years is not being actively supported. We moved on to the more advanced Pulpissimo for 32bit architectures. Unfortunately this system is not exactly friendly for beginners as it has some features that were developed for enhanced performance. We are currently working on a more streamlined Pulpissimo (will have a new name) and an educational system that we call Croc (to be released later this year). 

In the meantime for a simpler system consider, the system used by Ibex
  https://github.com/lowRISC/ibex/tree/mas...ple_system

Or X-Heep from our colleagues in EPFL
  https://github.com/esl-epfl/x-heep

As for tests, qemu and spike are emulators, you still need to use some programs to test the architecture against. RISC-C provides standard tests
  https://github.com/riscv-software-src/riscv-tests

For your own instructions, you need to add your own tests. 

Hope that helps.

[eureka]

Hello! I'm a student who is learning the riscv arch and the pulpino core, and I wonder how the team of pulpino verify the RV32IM instruction set and the custome instruction set, are your team use the official riscv-tests, or use riscv emulators like qemu or spike as ref, or build your own test sets.

Thank you very much!

Hello,

Pulpino is the name of the complete system, that surrounds the RISC-V core (in this case CV32E40P aka RI5CY) and adds peripherals and a memory subsystem. It was our first release, and for many years is not being actively supported. We moved on to the more advanced Pulpissimo for 32bit architectures. Unfortunately this system is not exactly friendly for beginners as it has some features that were developed for enhanced performance. We are currently working on a more streamlined Pulpissimo (will have a new name) and an educational system that we call Croc (to be released later this year). 

In the meantime for a simpler system consider, the system used by Ibex
  https://github.com/lowRISC/ibex/tree/mas...ple_system

Or X-Heep from our colleagues in EPFL
  https://github.com/esl-epfl/x-heep

As for tests, qemu and spike are emulators, you still need to use some programs to test the architecture against. RISC-C provides standard tests
  https://github.com/riscv-software-src/riscv-tests

For your own instructions, you need to add your own tests. 

Hope that helps.

Hello!

It helps me a lot!

Thank you very much!