Adding custom instructions into RI5CY core
#4
(09-25-2020, 10:17 AM)plumerai Wrote: We need RI5CY (or CV32E40P) extensions like bit manipulation and HW loops, and Ibex doesn't have a custom istruction interface anyway. I totally understand the benefits of the HWPEs, but still for some tasks it's good to have a custom instruction with very low latency (cycles). Does it mean that the only way to customize RI5CY is to modify the existing source codes? We are comfortable with HDL but the lack of code documentation may be an issue.

Note that, RI5CY is now being maintained by the OpenHW group. They are putting a lot of effort in the documentation, see under:
  https://core-v-docs-verif-strat.readthed...en/latest/

and it will only get better. Adding instructions is not really that difficult, but I admit we do not have a document ready that gives a "Adding custom instructions 101" type of tutorial. A lot of it also has to do with what kind of execution you are looking for (is it data, control, mixed) what kind of latency does it have, how does it map to existing execution units.. etc.. 

Higher level descriptions do not have implementation details like this set, so it allows you to move more quickly. But you pay the price with less control of what is going on.. There are several cases where the high-level approach is actually more efficient. Especially if you are doing a design space exploration, what if analyses etc..
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RE: Adding custom instructions into RI5CY core - by kgf - 09-25-2020, 11:12 AM

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