RISCY modifications possibilties
#1
Riscy and zero riscy cores based on the RISC V ISA are available as a part of different PULP systems. The specific custom extensions in the RISC V ISA are supported by the compiler. 

I was wondering If I can make changes to the RISCY core for eg adding a new h/w block like the h/w loop controller.
First of all with the given SDK is that even possible?
And is there a possibility of getting software support for such modifications. 

Thanks!
Reply
#2
Hello,

First of all RI5CY already has a HW loop controller, so technically no change is needed there.

Any addition to the processor functionality will need some additional support from the SW chain. It is of course possible that you add these and modify the SDK so that it works with these additions as well. But this is not 'automatic' and we do not really have a manual and step by step instructions for it. So technically possible, but practically involved. 

You can always use part of what we offer standalone (i.e. RI5CY without the SDK) and just patch the C compiler for your changes as well.

The other question is, once you made the changes, would we include them in the distribution and integrate your solution as part of our distribution? That is also possible in theory, but we need to maintain compatibility to existing projects and operation targets for the RI5CY core. A branch in this case would be the more pragmatic approach.

I am not sure if this answers the question
Visit pulp-platform.org and follow us on twitter @pulp_platform
Reply
#3
> First of all RI5CY already has a HW loop controller, so technically no change is needed there. 
Yes, I understand that RI5CY already has a hardware loop controller but I just used it as an example to indicate the type of hardware modification I was talking about.


> Any addition to the processor functionality will need some additional support from the SW chain. It is of course possible that you add 
> these and modify the SDK so that it works with these additions as well. But this is not 'automatic' and we do not really have a manual
> and step by step instructions for it. So technically possible, but practically involved. 

Ok.

> You can always use part of what we offer standalone (i.e. RI5CY without the SDK) and just patch the C compiler for your changes as
>  well.

If the compiler changes were patched up, what about the software changes for example in the kernel to support the custom extensions.
 
> The other question is, once you made the changes, would we include them in the distribution and integrate your solution as part of our
> distribution? That is also possible in theory, but we need to maintain compatibility to existing projects and operation targets for the 
> RI5CY core. A branch in this case would be the more pragmatic approach. 

Ok.
Reply
#4
(01-28-2019, 09:49 PM)Athena Wrote: If the compiler changes were patched up, what about the software changes for example in the kernel to support the custom extensions.
Maybe I do not understand the question correctly. Which kernel are you referring to? Technically once the compiler is able to generate code for (your modified) RISC-V core, you can compile anything (including a kernel) for that core.
Visit pulp-platform.org and follow us on twitter @pulp_platform
Reply
#5
(01-30-2019, 04:17 PM)Hi kgf Wrote:
(01-28-2019, 09:49 PM)Athena Wrote: If the compiler changes were patched up, what about the software changes for example in the kernel to support the custom extensions.
Maybe I do not understand the question correctly. Which kernel are you referring to? Technically once the compiler is able to generate code for (your modified) RISC-V core, you can compile anything (including a kernel) for that core.

By kernel I refer to something like a linux kernel or any other kernel which could be used to performing scheduling operation on a mulit-core PULP platform.
Reply


Forum Jump: