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PULP General questions
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| Thread / Author | Replies [asc] | Views | Last Post | ||
PULPino Boot ROM Address problem
11-30-2023, 03:28 AM
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1 | 3,568 |
12-29-2023, 12:54 PM Last Post: kgf |
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RISC V proyect research
12-01-2023, 01:39 PM
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1 | 3,480 |
12-29-2023, 01:09 PM Last Post: kgf |
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Snitch cluster: make bin/snitch_cluster.vlt error
02-06-2024, 08:44 AM
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1 | 3,073 |
02-07-2024, 07:38 AM Last Post: ashuthosh |
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How do I get the files needed for a custom model to be deployed on PULP?
02-29-2024, 12:36 AM
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1 | 2,990 |
04-05-2024, 10:22 AM Last Post: AlessioBurrello |
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Booting Pulpissimo from SPI - post silicon
04-22-2024, 06:01 PM
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1 | 2,713 |
04-25-2024, 06:19 AM Last Post: kgf |
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ELF Files for Polybench Tests
05-23-2024, 11:29 PM
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1 | 2,470 |
05-24-2024, 11:38 AM Last Post: kgf |
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axi_xbar integration issue
07-12-2024, 05:46 PM
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1 | 2,601 |
07-16-2024, 09:30 AM Last Post: tbenz |
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Pulpissimo block diagram
07-21-2024, 06:43 AM
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1 | 2,261 |
07-23-2024, 06:02 AM Last Post: kgf |
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how can i occur fmadd instruction?
07-29-2024, 08:08 AM
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1 | 2,260 |
08-05-2024, 10:35 AM Last Post: kgf |
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CV32E40P/RI5CY Setup
10-19-2024, 08:51 AM
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1 | 2,868 |
10-25-2024, 07:13 PM Last Post: kgf |
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librbs.so not found (Pulpissimo)
11-04-2024, 03:01 PM
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1 | 1,715 |
11-07-2024, 01:57 PM Last Post: bluewww |
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Multi Core PULP first time setup
12-25-2024, 05:53 PM
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1 | 3,069 |
01-02-2025, 02:23 PM Last Post: kgf |
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ri5cy debugger access to memory and breakpoint facility
12-27-2018, 09:30 AM
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0 | 6,655 |
12-27-2018, 09:30 AM Last Post: lightning_fingers |
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Using HAL headers in HERO project
06-03-2019, 11:46 AM
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0 | 5,704 |
06-03-2019, 11:46 AM Last Post: tmilkovic |
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Benchmarking using Coremark
02-05-2019, 02:06 PM
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0 | 7,406 |
02-05-2019, 02:06 PM Last Post: Athena |
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pulp-soc-defines.sv
04-18-2019, 08:17 AM
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0 | 5,574 |
04-18-2019, 08:17 AM Last Post: MikkeN |
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How to build SDK for PULPino?
04-19-2019, 12:27 PM
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0 | 5,785 |
04-19-2019, 12:27 PM Last Post: zhouqiang |
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RI5CY - FPGA Synthesis
05-07-2019, 03:20 PM
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0 | 5,898 |
05-07-2019, 03:20 PM Last Post: jaypi |
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Pulpissimo synthesis error
05-23-2019, 11:25 AM
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0 | 5,628 |
05-23-2019, 11:25 AM Last Post: MikkeN |
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How to simulate the bootloader with flash S25fs256s verilog model for pulpino?
05-25-2019, 04:52 AM
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0 | 6,035 |
05-25-2019, 04:52 AM Last Post: zhouqiang |
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