FPGA JTAG-cable and debugger sw
#2
Hi,

Quote:Do you have any suggestion to use as JTAG-cableĀ or debugging software, that you are going to support?

On the genesys2 I see two options:
1. Don't use any jtag cable but reuse the already existing FTDI chip through the micro USB port (labelled jtag). The FTDI chip exposes a second serial link that is routed to GPIO pins on the FPGA. You can use that and connect it to the PULPissimo jtag.
2. Use an Olimex adapter (like Olimex Ltd. ARM-USB-OCD-H JTAG+RS232), connect it to the PMOD connectors.

Regarding software we generally support gdb. As for the bridge that is required to allow gdb to talk to PULPissimo, the current master branch of PULPissimo (version 1.0.2 onwards) uses our own debug bridge to handle gdb connections. This is because these versions still use our custom debug unit.

For the new debug unit see below.

Quote:If understood correctly debugging software is going to need OpenOCD support and that is coming Q2/2019 for Pulpissimo. Right?

Indeed PULPissimo is going to have a compliant (riscv-debug-spec v0.13.1) debug unit and we intend to make it work with riscv-openocd out of the box.
Q2/2019 sounds about right, infact most things (gdb, openocd) are already working on the dbg_dev branch.

Regards,
bluewww
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Messages In This Thread
FPGA JTAG-cable and debugger sw - by Akim - 03-28-2019, 11:45 AM
RE: FPGA JTAG-cable and debugger sw - by bluewww - 03-28-2019, 06:34 PM
RE: FPGA JTAG-cable and debugger sw - by Akim - 04-15-2019, 09:48 AM
RE: FPGA JTAG-cable and debugger sw - by Akim - 04-16-2019, 10:09 AM
RE: FPGA JTAG-cable and debugger sw - by bluewww - 04-17-2019, 01:12 PM
RE: FPGA JTAG-cable and debugger sw - by Akim - 04-26-2019, 11:31 AM

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