04-07-2020, 03:33 AM
Hi,
I've already run "Hello" case successfully with Xcelium, now I have some further questions:
1. In readme I see it says "Either the RI5CY core or the Ibex one as main core". So by default, if I've built everything following readme, which core is used in the Soc?
2. In ARM cores, there is usually a program counter (PC) register, so that users can simply know where the issue happens (with disassembly code). Is there the similar register in Pulpissimo?
3. I see ./sim/boot/boot_code.cde is loaded in boot_rom. Is this boot_code.cde necessary for all the cases? Via the waveform of "Hello" case, I see something is read from boot_rom, but i'm not sure if the boot code is really used or not. What does the boot code do? Initialize the SoC? If I put my executable in SPI flash, can I still reuse the boot code before jumping to SPI content?
I've already run "Hello" case successfully with Xcelium, now I have some further questions:
1. In readme I see it says "Either the RI5CY core or the Ibex one as main core". So by default, if I've built everything following readme, which core is used in the Soc?
2. In ARM cores, there is usually a program counter (PC) register, so that users can simply know where the issue happens (with disassembly code). Is there the similar register in Pulpissimo?
3. I see ./sim/boot/boot_code.cde is loaded in boot_rom. Is this boot_code.cde necessary for all the cases? Via the waveform of "Hello" case, I see something is read from boot_rom, but i'm not sure if the boot code is really used or not. What does the boot code do? Initialize the SoC? If I put my executable in SPI flash, can I still reuse the boot code before jumping to SPI content?