several questions about Pulpissimo SoC platform
(04-07-2020, 06:20 AM)bluewww Wrote: 1. RI5CY is the default
2. the signal named pc_id is the pc value at decode stage, this is most likely what you are looking for. If you use questasim, you can source the software_debug.tcl script, it will show register values, pc and disassembly in the waveform viewer
3. the boot code can be found here Is is there to support SPI and JTAG booting which can be select by driving bootsel accordingly. So the bootcode will read the bootsel bit and either start reading from spi flash dumping into l2 and then jump to the entry point or just busy loop (or wfi) until the debug module takes control of the execution.

Thank you so much!
2. I find a signal "tb_pulp.i_dut.soc_domain_i.pulp_soc_i.fc_subsystem_i.FC_CORE.lFC_CORE.riscv_tracer_i.pc[31:0]" whose value is equivalent to pc_id, and I've confirmed it's aligned with disassembly
3. Just double check with you --- do you mean first I assign the pin "pad_bootsel" to 1'b0 (for spi flash), then boot code will read the value of this signal and decide where to jump?

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RE: several questions about Pulpissimo SoC platform - by ninipa - 04-07-2020, 06:55 AM

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