Posts: 4
Threads: 2
Joined: Oct 2019
06-03-2020, 02:35 PM
(This post was last modified: 06-06-2020, 12:45 AM by mehrdad.)
Hi,
I have build the PULP RISC-V GNU Compiler Toolchain [1] with multilib. It contains the following targets:
Code:
$ riscv32-unknown-elf-gcc --print-multi-lib
rv32imfcxpulpv2/ilp32;@march=rv32imfcxpulpv2@mabi=ilp32
rv32imfcxpulpv2/ilp32f;@march=rv32imfcxpulpv2@mabi=ilp32f
rv32imcxpulpslim/ilp32;@march=rv32imcxpulpslim@mabi=ilp32
rv32ic/ilp32/mreg16;@march=rv32ic@mabi=ilp32@mreg=16
rv32imcxgap8/ilp32;@march=rv32imcxgap8@mabi=ilp32
rv32imcxgap9/ilp32;@march=rv32imcxgap9@mabi=ilp32
Using PULPissimo's pulp-configs for the processor IPs [2] I could get some info about the targets but still, I have few questions about these targets:
- march=rv32ic, mreg=16:
This is used for Micro-riscy. What is the difference compared to march=rv32ec of RISC-V GNU Compiler Toolchain [3]?
- march=rv32imfcxpulpv2:
Is this rv32imfc plus the extra instructions introduced in RI5CY? (e.g. hw loops)
- march=rv32imcxpulpslim:
What is this? I saw it has been used for zero-riscy [4]. What is the difference to rv32imc or rv32emc?
Thanks and kind regards,
Mehrdad
[1]
https://github.com/pulp-platform/pulp-ri...-toolchain
[2]
https://github.com/pulp-platform/pulp-co.../ips/riscv
[3]
https://github.com/riscv/riscv-gnu-toolchain
[4]
https://github.com/pulp-platform/pulp-tr...8/Makefile
Posts: 43
Threads: 0
Joined: Mar 2019
(06-03-2020, 02:35 PM)mehrdad Wrote: Hi,
I have build the PULP RISC-V GNU Compiler Toolchain [1] with multilib. It contains the following targets:
Code:
$ riscv32-unknown-elf-gcc --print-multi-lib
rv32imfcxpulpv2/ilp32;@march=rv32imfcxpulpv2@mabi=ilp32
rv32imfcxpulpv2/ilp32f;@march=rv32imfcxpulpv2@mabi=ilp32f
rv32imcxpulpslim/ilp32;@march=rv32imcxpulpslim@mabi=ilp32
rv32ic/ilp32/mreg16;@march=rv32ic@mabi=ilp32@mreg=16
rv32imcxgap8/ilp32;@march=rv32imcxgap8@mabi=ilp32
rv32imcxgap9/ilp32;@march=rv32imcxgap9@mabi=ilp32
Using PULPissimo's pulp-configs for the processor IPs [2] I could get some info about the targets but still, I have few questions about these targets:- march=rv32ic, mreg=16:
This is used for Micro-riscy. What is the difference compared to march=rv32ec of RISC-V GNU Compiler Toolchain [3]?
- march=rv32imfcxpulpv2:
Is this rv32imfc plus the extra instructions introduced in RI5CY? (e.g. hw loops)
- march=rv32imcxpulpslim:
What is this? I saw it has been used for zero-riscy [4]. What is the difference to rv32imc or rv32emc?
Thanks and kind regards,
Mehrdad
[1] https://github.com/pulp-platform/pulp-ri...-toolchain
[2] https://github.com/pulp-platform/pulp-co.../ips/riscv
[3] https://github.com/riscv/riscv-gnu-toolchain
[4] https://github.com/pulp-platform/pulp-tr...8/Makefile
I believe the micro-riscy mreg=16 thing predates rv32e, but I don't know the exact differences.
rv32imfcxpulpv2 is indeed imfc plus xpulpv2 (x denotes a custom extension, in this case our pulpv2). In the RI5CY manual you can see what instructions are available and for example here
https://github.com/pulp-platform/pulp-ri...iscv-opc.c you can see the full opcode table of included instructions.
In that table you can also see what rv32imcxpulpslim (rv32 imc + xpulpslim). Basically the 9 additional instructions, most notably p.elw for interaction with the cluster event unit.
Posts: 4
Threads: 2
Joined: Oct 2019
06-06-2020, 12:44 AM
(06-03-2020, 03:06 PM)bluewww Wrote: (06-03-2020, 02:35 PM)mehrdad Wrote: Hi,
I have build the PULP RISC-V GNU Compiler Toolchain [1] with multilib. It contains the following targets:
Code:
$ riscv32-unknown-elf-gcc --print-multi-lib
rv32imfcxpulpv2/ilp32;@march=rv32imfcxpulpv2@mabi=ilp32
rv32imfcxpulpv2/ilp32f;@march=rv32imfcxpulpv2@mabi=ilp32f
rv32imcxpulpslim/ilp32;@march=rv32imcxpulpslim@mabi=ilp32
rv32ic/ilp32/mreg16;@march=rv32ic@mabi=ilp32@mreg=16
rv32imcxgap8/ilp32;@march=rv32imcxgap8@mabi=ilp32
rv32imcxgap9/ilp32;@march=rv32imcxgap9@mabi=ilp32
Using PULPissimo's pulp-configs for the processor IPs [2] I could get some info about the targets but still, I have few questions about these targets:- march=rv32ic, mreg=16:
This is used for Micro-riscy. What is the difference compared to march=rv32ec of RISC-V GNU Compiler Toolchain [3]?
- march=rv32imfcxpulpv2:
Is this rv32imfc plus the extra instructions introduced in RI5CY? (e.g. hw loops)
- march=rv32imcxpulpslim:
What is this? I saw it has been used for zero-riscy [4]. What is the difference to rv32imc or rv32emc?
Thanks and kind regards,
Mehrdad
[1] https://github.com/pulp-platform/pulp-ri...-toolchain
[2] https://github.com/pulp-platform/pulp-co.../ips/riscv
[3] https://github.com/riscv/riscv-gnu-toolchain
[4] https://github.com/pulp-platform/pulp-tr...8/Makefile
I believe the micro-riscy mreg=16 thing predates rv32e, but I don't know the exact differences.
rv32imfcxpulpv2 is indeed imfc plus xpulpv2 (x denotes a custom extension, in this case our pulpv2). In the RI5CY manual you can see what instructions are available and for example here https://github.com/pulp-platform/pulp-ri...iscv-opc.c you can see the full opcode table of included instructions.
In that table you can also see what rv32imcxpulpslim (rv32 imc + xpulpslim). Basically the 9 additional instructions, most notably p.elw for interaction with the cluster event unit.
Thanks a lot for the prompt response.
Posts: 2
Threads: 1
Joined: Apr 2022
For new toolchain @
https://github.com/pulp-platform/riscv-gnu-toolchain,
I am trying to build a toolchain for RI5CY, but got a warning when using -march=rv32imfcxpulpv2
cc1: warning: '-march=rv32imfcxpulpv2': m (multiplication) extension is enabled with pulpv2. This was originally not allowed
What's the correct option for RI5CY?