Does Pulpissimo already contain VCC & GND pins?

I am not very sure what you are trying to do (why do you want to add VCC and GND pins?). Normally the power connections are not handled at RTL level. Most digital design flows leave the power connections to the tools, i.e. use a power intent file (like CPF) to tell the tools how to do the power connections. If you are using a single power domain, there is technically no need to deal with the power during the front-end design flow at all.

Physical netlists may be designed to contain power pins which is sometimes needed for LVS, or sometimes for power aware simulations, however these are needed towards the end of an ASIC design cycle.
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RE: Does Pulpissimo already contain VCC & GND pins? - by kgf - 01-03-2021, 10:09 PM

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