PULP Community

Threads

1. Data relocation when using LOAD_L2=STANDALONE (4 Replies)
2. Questions regarding Runtime/SDK (2 Replies)
3. Target options for PULP RISC-V GNU Compiler Toolchain (2 Replies)
4. Pulpissimo prepare standalone flash image (3 Replies)
5. The status of Ariane ARA vector processor? (1 Reply)
6. How to find the signal which represents 16bit instructions in the design? (2 Replies)
7. using axi from rtl and C code (3 Replies)
8. Accelerator HWPE Example Loops on ZedBoard (0 Replies)
9. Editor to use with pulpissimo? (5 Replies)
10. Debug Boot code (4 Replies)
11. Cannot run hello,c on GDB when connected to Ariane via JTAG (3 Replies)
12. Add custom instruction (1 Reply)
13. several questions about Pulpissimo SoC platform (3 Replies)
14. Vsim schematic doesn't work (PULPissimo) (8 Replies)
15. PULP-sdk on centOS: error during build + fix (1 Reply)
16. Hello example (1 Reply)
17. Pulpissimo: Using JTAG and Flash for larger sets of data (2 Replies)
18. Regarding uDMA SPI Master (1 Reply)
19. FPGA - Booting (.bit + .elf) from flash or SD card (0 Replies)
20. UART test case (2 Replies)