Hi all,

I am planning to do some work on porting the Pulpissimo platform to several different FPGA boards. One will be Kintex KC705 and another one would Zynq ZC706. Potentially, there might also be a port to some of application specific boards, again, based on Kintex chip. 

I have run an out-of-box run for Zedboard just to get the feeling about the sizes of different iPs. One thing that I've noticed is that the clock frequency is set to 20MHz for the Zedboard and that the Vivado synthesis/implementation does report a fail in timing closure even for such a low clock frequency. 

My actual idea was to port to ZC706 and KC706 and to use a clock frequency of somewhere in the neighborhood of 80MHz-100MHz. 
Is this something that should be achievable? What would be a maximal achievable frequency for FPGA synthesis? 

In addition, have you been doing any synthesis runs for TSMC 40nm LP?

Thanks.

Cheers,
NK

Hi all, 

I am new to the forum and like to say Hi to all. I've been looking into using Pulpissimo platform in one of my projects that I am currently working on and would like to ask for some help. At the moment, I am at the very early stage of the project. My intention is use to use very basic subset of the Pulpissimo platform so I would like to start by removing some things that I don't need.

Is there an easy way of removing Hyperram interface from the udma subsystem? I would potentially also want to remove Cam interface and I2S interface. My project will, most likely, be using SPI and SDIO interfaces as well as uart. 

Thanks. 

If there is already a thread addressing this topic, please refer. 

Best 
Nemanja

Hello, team!

I am currently working on a project related to PULPino. I am wondering how to put the core in the IDLE state. The datasheet introduces an apb_event_unit for clock gating everything else and waking up the core if an event/interrupt arrives. I notice there is another peripheral, apb_pulpino contains CLK Gate as well. 
However, while running benchmarks such as hello/fft/sha/fir, I could not find the situations when the core is in the IDLE state. In other words, the clock signal is not gated during the entire operation. Is the clock gating function being enabled? Is there any benchmark I can use to test the clock gating (it would be better if the riscv-core and peripherals can be clock gated simultaneously)?

Thanks for your kind reply！

Hello, 

Just a quick question about the pulpissimo.

We implemented pulpissimo on the zcu102 board, and successfully ran some examples using SDK. We would like to ask if we have such "int a = {1,2,3,4};" array in the program, for example, in the hello test, where would the array be stored? Is that stored in the 8kb ROM, or 512kb L2?

We are asking this because we could successfully define the array under the size of 175, but when we defined the array with a larger size (e.g. a = {0,0,0,0,0,0,0,0......0}), the program will be stuck.

Thanks,
Zongru

Hello good members!
I've recently started working with pulp platform and ran MobileNet application available on both dory and pulp-sdk by following the instructions given on github. It was a successful test however i am not able to understand from where the input values are taken or generated and i wanted to modify the input image size and see the output. can anyone help me understand.

Hello

We are moving to pulp3 from pulp2 without the migration path. Setting all up in a container.
Using pulp/squeezer

Using the base_url from the created distribution, the web page displays three lines as below.
Inside Packages are directories [0-1a-z] and the packages are in there.


I was expecting a list of packages.
Are there a way to have the URL display the list of packages on one page?
Thanks so much.


base-url result:

• Packages/
  
• config.repo
  
• repodata/
  

Hi Experts,

I'm wondering, is the original Pulpissimo on git be able to boot Linux kernel? (with RI5CY I guess)
If not, how can I achieve it with minor changes? (like replacing RI5CY with Ariane). I'm expecting not to use certain platform like FPGA. It's like I'm going to boot up Linux in simulation with Pulpissimo (despite of speed)

Hi everyone,

I'm currently working on my Master's thesis where I need to implement a software algorithm using 36 bit integers. My first approach was using the int64_t C type to represent my number. While it all worked fine on my local machine the algorithm broke in the Pulpissimo simulator.

After a while of debugging I figured out that the int64_t type does not work for me. To get started I modified `pulp-rt-examples/hello/test.c` to the code printed below, which is also a small example showing the issue that int64_t types always return the same value. I'm not sure whether this is a bug or I need to reconfigure something.

Do you have any idea how to solve this? Maybe I need to activate some compile flag or is there some 64-bit extension that I could easily add to the processor core?

I saw that the compiler does also support C++ so I wanted to give this a try but I couldn't find an example project to see how I can get the C++ compiler running. Simply changing the file extension from *.c to *.cpp did not work unfortunately.

Thank you very much

BR
Dominik

Compiling OpenOCD (with gcc (Ubuntu 9.3.0-17ubuntu1~20.04) 9.3.0) as described in https://github.com/pulp-platform/pulpiss...l-platform, section "GDB and OpenOCD":

Quote:  In src/flash/mflash.h the line

Quote:  should be changed to

Quote:This is obviously an error, since in mflash.c reserved7 is accessed using
    memset(pSegIdDrvInfo->reserved7, 0x00, 190);

    Current gcc compiler flags this with an out of bound warning. In combination with the "Werror" flag, the compilation will be aborted.

Hi team,
I am trying to run pulp-rt examples on the Zephyr platform, but I didn't find any documentation regarding this.
Is pulpissimo run on Zephyr RTOS?  If pulp supports Zephyr, can you help me to find the documentation/steps? Your help in this regard is highly appreciated.

Thanks in advance
RiscV