Hi All,

I am trying to pre-load the pulpissimo bitstream along with the application on a Genesys 2 to run the application directly without connecting it to PC. This is mainly to be done either using the SD card or SPI flash. 

Does anyone have an idea on how to merge the .bit and .elf file together to be loaded upon powering the FPGA? All the sources I found were talking about Microblaze based systems. 

Any help will be highly appreciated. 

Thanks!

Hi,
There are some problems encountered here. During the calculation of the unsign memory load behavior, it was found that the behavior of the compiler may be wrong through the analysis of the assembly.
Related C code test.c :

**The analysis process is as follows:
Step 1(original) :
riscv32-unknown-elf-gcc -O2 -march=rv32IMCXpulpv2 -Wa,-march=rv32IMCXpulpv2 -Wextra -Wall -Wno-unused-function -fmerge-all-constants -fno-exceptions -fno-unwind-tables -fno-asynchronous-unwind-tables -fdata-sections -ffunction-sections -fdiagnostics-color=always -fstack-usage -nostartfiles -fsigned-char -Wno-pointer-sign -Wl,--no-check-sections -Wl,--gc-sections -Wall -Werror -Wno-shift-negative-value -Wno-unused-but-set-variable -Wno-unused-variable -msave-restore -c test.c -o test.o

Step 2 ("unsigned char *" modify to "unsigned short *") :
riscv32-unknown-elf-gcc -O2 -march=rv32IMCXpulpv2 -Wa,-march=rv32IMCXpulpv2 -Wextra -Wall -Wno-unused-function -fmerge-all-constants -fno-exceptions -fno-unwind-tables -fno-asynchronous-unwind-tables -fdata-sections -ffunction-sections -fdiagnostics-color=always -fstack-usage -nostartfiles -fsigned-char -Wno-pointer-sign -Wl,--no-check-sections -Wl,--gc-sections -Wall -Werror -Wno-shift-negative-value -Wno-unused-but-set-variable -Wno-unused-variable -msave-restore -c test.c -o test.o

hi all,

I tried integrating GPIO in pulp environment. after integrating I was able to run testcase but I am not able to get received data.
i.e) this the the output I got after simulating:

warning: NUMERIC_STD."=": metavalue detected, returning FALSE
#    Time: 0 ps  Iteration: 0  Instance: /tb/top_i/peripherals_i/apb_uart_i/UART_RXFF
# ** Warning: NUMERIC_STD."=": metavalue detected, returning FALSE
#    Time: 0 ps  Iteration: 0  Instance: /tb/top_i/peripherals_i/apb_uart_i/UART_TXFF
# Using MEMLOAD method: PRELOAD
# Using      ri5cy core
# [SPI] Enabling QPI mode
# [adv_dbg_if] AXI4 WRITE         32 burst @1a107008 for           4 bytes.
# Preloading memory
# Preloading instruction memory from slm_files/l2_stim.slm
# Preloading data memory from slm_files/tcdm_bank0.slm
# [TRACER] Output filename is: trace_core_00_0.log
# RX string: Successfully enabled func 2 on PIN_MSPI_CSN1                                                                                                                                               # RX string: Successfully set out dir on PIN_MSPI_CSN2                                                 # RX string: Done!!! 

Can anyone please help me to  know why this occurs and let me know what mistake I have done.
thanks and regards,
mahalakshmi

Can anyone help me to find the output file(executable binary file)/folder of the C compiler when we try to execute the testcase files (testUART.c , testI2C.c, testGPIO.c).

Hi,


I need to monitor and the connectivity and signal transitions from the processor to the TCDM when there is a memory request, to understand the timing and how communication works.

On this page :
https://github.com/pulp-platform/bigpulp

For hardware debugging, it asks to copy the generated .slm files. I have no .slm files nor the folder " build/system-bigpulp*/ in after installing the pulp SDK and running OpenMP examples.

https://github.com/pulp-platform/hero-sd.../README.md

I would be thankful to get some help.
Thanks

Hello, I did some changes to the Ariane core (mainly in the frontend) and tried to boot the provided Linux version again. Unfortunately, the bootrom does not work anymore, such that I don't get the first 'Hello World!' output.

But if I build the bootrom (with the provided makefile) and load the resulting bootrom.elf in gdb, then everything works just fine and in the simulation it also looks quite good. Without the changes to the Ariane core Linux boots as well.

Any idea why this happens? I currently don't have any idea where to begin searching for the problem.

I made significant changes to frontend.sv, instr_queue.sv and instr_scan.sv and minor changes to branch_unit.sv and controller.sv. Neither of these changes should affect the fetching of the first instruction.

Thank you very much!

Hello，

hi,
 
I tried running interfaced GPIO with the test cases given in PULPino environment. after running testcases I am getting has test case  failed. why test failed occurs.

** Warning: NUMERIC_STD."=": metavalue detected, returning FALSE
#    Time: 0 ps  Iteration: 0  Instance: /tb/top_i/peripherals_i/apb_uart_i/UART_RXFF
# ** Warning: NUMERIC_STD."=": metavalue detected, returning FALSE
#    Time: 0 ps  Iteration: 0  Instance: /tb/top_i/peripherals_i/apb_uart_i/UART_TXFF
# Using MEMLOAD method: PRELOAD
# Using      ri5cy core
# [SPI] Enabling QPI mode
# [adv_dbg_if] AXI4 WRITE         32 burst @1a107008 for           4 bytes.
# Preloading memory
# Preloading instruction memory from slm_files/l2_stim.slm
# Preloading data memory from slm_files/tcdm_bank0.slm
# [TRACER] Output filename is: trace_core_00_0.log    
#[SPI] Received 00000003
#[SPI] Test  Failed
# **Note :$Stop   

please respond
thanks in advance.

Hi,

I don't want to hijack one of the other current threads on getting started with Pulpissimo and my problem does not seem to be related to any of them anyway.
I am trying to get Pulpissimo to run on a Zedboard and would like to ask anybody who successfully done this to share his/her exact git revisions of the various related repositories. I think this might be the cause of my problems.

What (presumably) works:

1. Synthesis: I was able to synthesize the design and download it to the zedboard. When I do so the hardware sets the LD0 LED.
   
2. Compilation: I have built the PULP-SDK and I am able to compile binaries using pulp-rt. So far I have only tested the hello pulp-rt-example.
   
3. Debugging: Since I don't have the Digilent JTAG adapter I am using an old Altera USB Blaster attached to the PMOD pins. I have changed the OpenOCD configuration accordingly and are able to connect, load and control execution of the RISC-V core with GDB. On first connect it is stopped at 0x1c008080, i.e. _start.
   

Hi,

I'm working on a design based on PULPissimo and we're about to tape-out a test chip. But the technology that we're working on is pretty "big" (HC90L from SK Hynix), thus 512KB of total memory takes way too much area. Therefore I wanna reduce the total size of memory into half (256KB). 

In order to do that, I modified these:
- pulp_soc.sv (half size for both L2_BANK_SIZE and L2_BANK_SIZE_PRI).
- fpga_settings.mk (for a test build on FPGA)
- soc_interconnect.sv (for memory address, reduce PER_END_ADDR of PRI_L2_CH1, PRI_L2_CH0 and TCDM_END_ADDR).
- pulp-configs/configs/chips/pulpissimo/pulpissimo.json (memory size for sdk I guess)
The result is pretty bad. Simulation shows lots of "a request with unknown address". I guess I was wrong somewhere, or missed something.

And  since I disable FPU to reduce SoC size (I don't really need it), I also change ri5ky_v2_fpu_1_10 to a custom core that doesn't have FPU arguments.
-   "isa" from "rv32imfcXpulpv2" to "rv32imcXpulpv2"
- Remove "--fpu", "--fpud" and "--shared-fpu" from "gv_isa"
- Remove "compiler_args"
Eventhough, the final binary generated by SDK still has FPU related instruction, which will resulted in "Illegal instruction" exception while execute the program. 

Can you please help me out with above issues? Thank you very much in advance.
Regards.