Welcome, Guest
You have to register before you can post on our site.



Search Forums

(Advanced Search)

Forum Statistics
» Members: 811
» Latest member: biehuai126
» Forum threads: 199
» Forum posts: 656

Full Statistics

Latest Threads
Where's the data stored?
Forum: PULP General questions
Last Post: zorrolee777
11-03-2021, 10:40 PM
» Replies: 0
» Views: 136
Modify input image on Mob...
Forum: PULP General questions
Last Post: kgf
10-22-2021, 11:30 AM
» Replies: 1
» Views: 351
Distribution base_url dis...
Forum: PULP General questions
Last Post: janr7
08-13-2021, 08:50 AM
» Replies: 0
» Views: 5,537
Is that possible to boot ...
Forum: PULP General questions
Last Post: kgf
08-04-2021, 07:58 AM
» Replies: 1
» Views: 569
JTAG and Stimulifile
Forum: PULP General questions
Last Post: ufsahu
07-12-2021, 09:14 AM
» Replies: 2
» Views: 1,348
Pulpissimo porting to Zep...
Forum: PULP General questions
Last Post: stefanct
07-05-2021, 01:32 AM
» Replies: 2
» Views: 1,133
How to get in64_t working...
Forum: PULP General questions
Last Post: Dom2231
06-30-2021, 02:19 PM
» Replies: 2
» Views: 1,123
Bitstream generation of N...
Forum: PULP General questions
Last Post: LarsKeuninckx
06-25-2021, 12:38 PM
» Replies: 1
» Views: 1,395
*OpenOCD compilation erro...
Forum: PULP General questions
Last Post: LarsKeuninckx
06-25-2021, 09:35 AM
» Replies: 0
» Views: 573
pulp optimization problem...
Forum: PULP General questions
Last Post: meggiman
06-24-2021, 07:05 AM
» Replies: 1
» Views: 821

  Accelerator wait function in BigPULP
Posted by: Adi - 01-15-2019, 02:55 PM - Forum: PULP General questions - Replies (2)


I'm developing an HWPE which is supposed to run with BigPULP.
I want to wait for my HWPE to finish executing from my C code. In pulpissimo, I used the following code:

__rt_periph_wait_event(ARCHI_SOC_EVENT_FCHWPE0, 1);

But with bigpulp, which I run on HERO, I have to use this API. I tried this code:

I also tried other combinations of functions from this API, but none of the wait functions returns (even though my accelerator finished working).
Which functions do I need to use and how?


Print this item

  Where is the "get started" documentation?
Posted by: byllgrim - 01-14-2019, 10:24 AM - Forum: PULP General questions - Replies (9)


I don't have time to be eloquent, sorry.

Is there some documentation, readme or tutorial on how to use the pulp designs?
Maybe it is common knowledge in the field of digital design (like ./configure make is a common standard in software), but I am a meager noob and student and I spent lots of hours without getting anything to work.

I managed to use modelsim to compile all RI5CY sources necessary to run a simulation of tb_riscv_core, but there was no clock signal and I don't know how to load programs etc.
Maybe I was hasty but I couldn't find proper help in the repo.

Regards Robin.

Print this item

  Sharing data between PULP and HWPE on HERO
Posted by: Adi - 01-08-2019, 06:06 AM - Forum: PULP General questions - Replies (12)


My goal is to run an application on PULP which passes data to my PULP accelerator (HWPE) and vice versa (I use the ARM standalone application just as a way of running my PULP application, if this is at all necessary, is it? So I don't want to share data between the ARM and PULP, but between PULP and my HWPE)
When I simulated my accelerator on PULPissimo, my PULP application stored data in the TCDM simply by accessing a known offset (there was no virtualization), and the accelerator could access the same data with the appropriate address. I want to have the same functionality with HERO, so how do I do it? If I use addresses like in PULPissimo, what are the proper addresses? (I was advised to use 0x1b201000, but it didn't work for me) If it's more complicated than just accessing some offset, how do I do it otherwise and what Makefile I use which will work with both the HWPE API and the data sharing API?

In addition, I have another question regarding compiling a PULP application (not accelerator related). I want to use the riscv-blas library in my PULP application. This library includes Fortran code. The riscv-toolchain in the HERO environment doesn't have gfortran, so I tried to build another riscv toolchain with gfortran in order to compile the library. However, when I try to link libgfortran.a (generated with the second toolchain) to the PULP application using the HERO scripts, I get a lot of link errors about std C functions that are missing. So I was wondering, what is the proper way of compiling Fortran in a PULP application? Alternatively, if you're familiar with another solution of using BLAS on PULP, I'd appreciate if you could refer me to it.


Print this item

  ri5cy debugger access to memory and breakpoint facility
Posted by: lightning_fingers - 12-27-2018, 09:30 AM - Forum: PULP General questions - No Replies

Hello again!

The documentation for the ri5cy core, although getting better, is still a little "light" on details for the debugger hardware.

Is there any facility available for accessing memory whilst in debugging mode?
if not, how is it proposed that memory should be accessed when debugging?

what would be the suggested mechanism for implementing a breakpoint mechanism such the executing programme can be run up to a point then the debugger activated?
(I already have a simulation where I can single step the core at a specified simulation clock count, in reality this needs to be at a specified PC).

Thanks in advance

Print this item

  update to ri5cy core interrupt system and toolchain
Posted by: lightning_fingers - 12-27-2018, 09:25 AM - Forum: PULP General questions - Replies (4)


I am investigating using the ri5cy core for a commercial application.
Quite some time ago I looked into the ri5cy core via the Embecosm githubu fork:

This seems to (now) be a quite old version of the core (32 interrupt inputs, much different csr implementation).

So, I've updated my core payload with the latest ri5cy rtl build.

I now have problems with my prototype interrupt code.
In C I have:

in "main()" {
    set_csr (0x300, 0x00000009);            //enable interrupts?
    write_csr(0x305, my_isr);               // isr address?
    // big long delay
    for (int i=0;i<10000;i++) asm("NOP");


void __attribute__ ((interrupt())) my_isr (){
    *simresult = (unsigned short int) 0xF111;    // flag result

which gives me:
00000300 <my_isr>:
 300: ff010113           addi sp,sp,-16
 304: 00f12423           sw a5,8(sp)
 308: 00e12623           sw a4,12(sp)
 30c: 40002703           lw a4,1024(zero) # 400 <simresult>
 310: 0000f7b7           lui a5,0xf
 314: 11178793           addi a5,a5,273 # f111 <_end+0xece5>
 318: 00f72023           sw a5,0(a4)
 31c: 00c12703           lw a4,12(sp)
 320: 00812783           lw a5,8(sp)
 324: 01010113           addi sp,sp,16
 328: 10000073           eret

The compiler is inserting the correct isr handling code......
But when simulated with the latest ri5cy core I get:
#  - DGB - write 0 into CTRL
#        2465870000 ps: Illegal instruction (core 0) at PC 0x00000328:
#        2469762000 ps: Illegal instruction (core 0) at PC 0x00000328:

I read in the riscv documentation that eret should now probably be an mret.
(At present I am using the embecosm modified toolchain (gcc).)

where can I download the "official" build gcc build tools for the latest ri5cy core (including all of the ri5cy additions like the hardware loop functionality)?

Many thanks in advance

Print this item

  hero-sdk for ZynqMP
Posted by: dave.mcewan - 12-21-2018, 03:57 PM - Forum: PULP General questions - Replies (7)

Hello again,

I'm trying to build hero-sdk, specifically hero-gcc-toolchain, for use on a ZCU102 and I'm running into some errors.
The first error is when compiling aeabi_lcsts.c:

hero-sdk/hero-gcc-toolchain/install/arm-linux-gnueabihf/libc/usr/include/asm/sigcontext.h:53:2: error: unknown type name '__uint128_t'

With some googling this *may* be related to CFLAGS with a -std=c11 instead of -std=gnu11. However the output from make says I'm already using gnu11:
arm-linux-gnueabihf-gcc ../sysdeps/arm/aeabi_lcsts.c -c -std=gnu11 -fgnu89-inline [... snip ...]

To retarget the host CPU architecture I've made the following changes in hero-sdk:
diff --git a/scripts/hero-z-7045-env.sh b/scripts/hero-z-7045-env.sh
index 0c7af43..31bba7d 100755
--- a/scripts/hero-z-7045-env.sh
+++ b/scripts/hero-z-7045-env.sh
@@ -36,11 +36,11 @@ export HERO_TARGET_PATH_DRIVER="${HERO_TARGET_PATH}/drivers"
 # Host-side platform config
-export PLATFORM="2"
-export BOARD="zc706"
+export PLATFORM="5"
+export BOARD="zcu102"
 # Host-side user-space config
-export ARCH="arm"
+export ARCH="arm64"
 export CROSS_COMPILE="arm-linux-gnueabihf-"
 export HERO_LIBPULP_DIR=`realpath hero-support/libpulp`
And in hero-gcc-toolchain:
diff --git a/scripts/hero_arm_toolchain_env.sh b/scripts/hero_arm_toolchain_env.sh
index 6cedabe..67a3760 100755
--- a/scripts/hero_arm_toolchain_env.sh
+++ b/scripts/hero_arm_toolchain_env.sh
@@ -19,7 +19,7 @@
 HERO_HOST_FPU_CONFIG="--with-fpu=neon-fp16 --with-float=hard"


Build platform is Ubuntu 16.04.
If I leave scripts/hero-z-7045-env.sh so that it's configured for ZC706 with ARM7 host cores then all parts of the hero-sdk build process complete successfully.

Since there appears to be some code related to ZynqMP in the makefiles, is there somebody here who has successfully built for this target?

Print this item

  Busybox Version
Posted by: Muhammad Usman - 12-20-2018, 07:21 PM - Forum: PULP General questions - Replies (1)


Can you help me resolve this Busybox version issue?

cd buildroot && make ARCH=arm CROSS_COMPILE=arm-xilinx-linux-gnueabi- -j4
make[1]: Entering directory '/home/usman/risc-v/pulpino_2015-4/pulpino/fpga/sw/buildroot'
>>> toolchain-external undefined Extracting
>>> toolchain-external undefined Patching
>>> toolchain-external undefined Configuring
Incorrect selection of kernel headers: expected 3.16.x, got 3.19.x
package/pkg-generic.mk:146: recipe for target '/home/usman/risc-v/pulpino_2015-4/pulpino/fpga/sw/buildroot/output/build/toolchain-external-undefined/.stamp_configured' failed

Print this item

Posted by: Mixermachine - 12-19-2018, 01:31 PM - Forum: PULP General questions - Replies (2)

Hello there,

I currently collect information for my bachelor thesis and want to compare popular RISC-V implementations.
You have a nice graphic 
[Image: pulp_family4.png]

Does there exist a documentation or has somebody knowledge about how the RISC-V cores match to for example ARM cores.
For example:

RI5CY <-> ARM cortex M0
PULPino <-> ARM cortex M0

Greetings from Munich,


The people over at Si-Five compare their cores here for example https://www.sifive.com/core-designer (scroll to the bottom)

Print this item

  Compilation error
Posted by: kkarthik976 - 12-18-2018, 05:19 AM - Forum: PULP General questions - Replies (1)

I am getting the error at the time of compilation when iI use -march=RV64.
Even i tried with the rv32 or rv64 also.


Print this item

Brick PULPino on Vivado 2018.1
Posted by: Muhammad Usman - 12-14-2018, 03:48 PM - Forum: PULP General questions - Replies (1)

I have been trying to migrate PULPino project to Vivado 2018.1 workflow. I have been successfully able to compile hardware-software project to obtain files in sd_image. Setting up and booting the SD Card sets up Programmable Logic (as indicated by blue light). Linux is NOT booting. Please help me identify and fix the problem.

Print this item