Hi,

I have problems using the JTAG debugging connection with GDB for the Ariane Softcore. The Genesys 2 Board is connected to my PC via JTAG. I have OpenOCD with RISC-V support  installed on my machine and it seems to connect just fine:

Hi,

In PULPino environment there are some HEX Files getting generated while i tried to run testcase. So my query is where the conversion from C to HEX file is taking place (code & path). 

thanks in advance.

(11-25-2019, 07:10 AM)mahalakshmir.ma Wrote: Hi,

In PULPino environment there are some HEX Files getting generated while i tried to run testcase. So my query is where the conversion from C to HEX file is taking place (code & path). 

thanks in advance.

hi,
 while simulating GPIO in questasim I am getting following error.
please tell me why this occurs and how to resolve it.


thankyou

Hi all, 

First of all, thanks a lot for your help and support.

I was wondering if there is a synthesis - clean version of PULPissimo that's already released to the public. If not, is there any document / way to understand how the clock the distribution is going ? 

What I understand, correct me if I am wrong, that in the case of: 

1- FPGA, u r using a reference clock of 200 MHz to generate two internal clocks by divisions: A- Soc_clk = 20Mhz , B- periph_clk = 10Mhz.

2- In case of the RTL simulation, you r feeding from the TB a reference clock of ~ 32KHz and somehow, using DCO, FLL generating two clocks soc_clk = periph_clk = 17.5 MHz. 

If I am correct, are this on-chip clock generation modules synthesizable? Or they should be mapped to IPs in the PDK ? 

--------- 

Assuming that I want to drive the whole chip using the external clock, is it save to just remove all the " fll, DCO.. etc" modules and pass the signal through the modules to all the system components ? I mean the PAD_xtal_clk, pass it for the fc_subsystem, l2_memory .. etc and the system can work on that clock ? I already did simulation and it worked, but I am making sue that I didn't miss anything as I didn't test the system exhaustively. 

Thanks in advance.

Hi,

I tried to include a new peripheral (PWM) into the PULPino environment, where can I get the library files for that peripheral or it will be auto generated.

Hello! I do the flow according to the Pulpissimo's README.md. But I meet a make error when I execute  the flow at the step "Downloading and running tests ".I change directory to  pulp-rt-examples/hello, and execute make clean all run ，then a "No Such File or Directory" error appears. I cat the Makefile,maybe the PULP_SDK_HOME is undefined. Do I need to set the PULP_SDK_HOME in my .bashrc  manually?

   
[attachment=15][attachment=15]
Hi,
I got some errors when build Linux cross-compiler with the following command:

Hello,

throughout the code you can find things like:

Hi,

i am trying to do some performance measurements on the Ariane processor and therefore, I would like to use the cycle count from the RDCYCLE instruction. My code compiles fine, however, if I run it, I get a “illegal instruction” error. The following is the critical code snippet (both the CSRRS and RDCYCLE lead to the same error)

I have tried to install the Pulpissimo SDK, but without success. I have searched in the Forum for a similar problem, but I couldn't find it. Therefore, I'm posting here the sequence of commands I'm issuing and the final result. Any help will be appreciated.

I'm working on a clean Linux 16.04.06 Install. Following the information available in GitHub, here is the sequence I'm following:

1 - sudo apt install git python3-pip gawk texinfo libgmp-dev libmpfr-dev libmpc-dev swig3.0 libjpeg-dev lsb-core doxygen python-sphinx sox graphicsmagick-libmagick-dev-compat libsdl2-dev libswitch-perl libftdi1-dev cmake scons libsndfile1-dev

2 - sudo pip3 install twisted prettytable pyelftools openpyxl xlsxwriter pyyaml numpy configparser pyvcd

3 - sudo pip3 install configparser

4 - cd /opt

5 - sudo mkdir riscv

6 - cd riscv

7 - git clone https://github.com/pulp-platform/pulp-ri...-toolchain

8 - cd pulp-riscv-gnu-toolchain

9 - git submodule update --init --recursive

10 - sudo apt-get install autoconf automake autotools-dev curl libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libtool patchutils bc zlib1g-dev

11 - sudo ./configure --prefix=/opt/riscv --with-arch=rv32imc --with-cmodel=medlow --enable-multilib

12 - make

13 - export PULP_RISCV_GCC_TOOLCHAIN=‘/opt/riscv’

14 - cd /opt/riscv

15 - sudo git clone https://github.com/pulp-platform/pulp-builder.git

16 - cd pulp-builder

17 - source configs/pulpissimo.sh

18 - sudo ./scripts/build-gvsoc

This last command fails with the following error:

...
make: Entering directory '/opt/riscv/pulp-builder/archi'
scons
scons: Reading SConscript files ...
ImportError: No module named configparser:
  File "/opt/riscv/pulp-builder/archi/SConstruct", line 4:
    import pulp_config as plpconfig
  File "/opt/riscv/pulp-builder/install/ws/python/pulp_config.py", line 23:
    import configparser
Makefile:2: recipe for target 'build' failed
make: *** [build] Error 2
make: Leaving directory '/opt/riscv/pulp-builder/archi'

I get exactly the same result if, instead of command 18 i issues the following three commands:

./scripts/clean
./scripts/update-runtime
./scripts/build-runtime

Since module configparser was apparently installed in step 3 I don't know what may be wrong.

Thank you very much in advance for your help.