The aim of this website is to provide additional documentation for HERO, i.e. our open-source, FPGA-based, heterogeneous SoC research platform that combines a fully-modifiable RISC-V manycore accelerator with an ARM Cortex-A host processor. This includes detailed information on how to generate and setup operation of the platform.
How to generate the FPGA bitstream for HERO containing bigPULP is explained here. On the software side, the HERO combines two different open-source software stacks. The accelerator uses the PULP Software Development Kit (SDK). The host runs a full-stack Linux. Depending on the selected FPGA board/host CPU, a different version is used. How to generate and customize the bootloaders, Linux kernel and root filesystem for the host is explained here.
This website is work in progress. We currently have the following pages:
- General/Overview/Platform Overview
- Hardware/bigPULP/Bitstream Generation
- Software/Programming/Shared Virtual Memory