Hi,

I'm trying certain software debug tool on pulpissimo. To build alignment between source code and disassembly, I need to trace both "pc" and the corresponding "instruction" in the design during runtime.
I've found the "pc" shall be "tb_pulp.i_dut.soc_domain_i.pulp_soc_i.fc_subsystem_i.FC_CORE.lFC_CORE.id_stage_i.pc_id_i[31:0]"
And probably the "inst" shall be "tb_pulp.i_dut.soc_domain_i.pulp_soc_i.fc_subsystem_i.FC_CORE.lFC_CORE.id_stage_i.instr[31:0]"

For example, on "hello" case, a piece of disassembly is:
   

The waveform is like:
   

you can see when the instruction is 32bit, disassembly is matched with waveform (eg. pc=0x1c008130, inst=0x82f72a23)
But when the instruction is 16bit, looks like I can find a signal in waveform to show the 16bit instruction correctly... for example, pc=0x1c008134, disassembly shows the instruction val=0xc69c; but the 32bit "inst" signal shows different value in the waveform...
Instead, I find the 16bit inst at output of L2 ram... But I can't use the output of L2 ram in my tool since it's too hard to align with pc...

any ideas?

Thank you!

Hello,

Right now I am trying to run the accelerator example on the zedboard, but right now I have a issue regarding of running the application. For some reason after this line of code __rt_periph_wait_event(ARCHI_SOC_EVENT_FCHWPE0, 1), the application loops. What can be a good approach to fix it?

Hi,

I migrated pulpissimo simulation env to a synthesizable env. I removed tb part so there is no JTAG action (but I confirmed the clocks are all fine in the system). bootsel has been set to 1'b1.
Even without the JTAG action, I expect at least boot-code can run correctly.
But, via compare PC (tb_pulp.i_dut.soc_domain_i.pulp_soc_i.fc_subsystem_i.FC_CORE.lFC_CORE.id_stage_i.pc_id_i[31:0]) value in golden simulation and my simulation. I found that after several instructions, my simulation jumped to another branch, like:
golden sim: .... 0x1a0002dc -> 0x1a0002de -> 0x1a0002e0 -> 0x1a0002e4 -> 0x1a0002e6 -> 0x1a000316 -> .....
my sim:      .... 0x1a0002dc -> 0x1a0002de -> 0x1a0002e0 -> 0x1a0002e4 -> 0x1a0002e6 -> 0x1a0002e8 -> .....
before that, the PC value and sequence is exactly the same

Now my problem of debugging it is: ./sim/boot/boot_code.cde is already made as hex file. I can find the src boot-code at https://github.com/pulp-platform/boot-code, but when I try to make executable, it is invoking "pulp-runtime/install/rules/pulp_properties.mk" but it's not there... (I want to make exe and then objdump it to debug with disassembly)

Can you please point me how to generate the corresponding disassembly to boot_code.cde? Or can you simply help me figure out why my simulation fails with the PC sequence I provided? 

Thank you!

I downloaded pulp riscv gnu toolchain and pulp sdk. I there a way to add a custom instruction to the riscv cross compiler?

Hi
I want to run simple hello.c example So I compiled as following:
riscv64-unknown-elf-gcc hello.c -L linker.lds -o hello.elf
where linker.lds is :

Hi,
I've already run "Hello" case successfully with Xcelium, now I have some further questions:
1. In readme I see it says "Either the RI5CY core or the Ibex one as main core". So by default, if I've built everything following readme, which core is used in the Soc?
2. In ARM cores, there is usually a program counter (PC) register, so that users can simply know where the issue happens (with disassembly code). Is there the similar register in Pulpissimo?
3. I see ./sim/boot/boot_code.cde is loaded in boot_rom. Is this boot_code.cde necessary for all the cases? Via the waveform of "Hello" case, I see something is read from boot_rom, but i'm not sure if the boot code is really used or not. What does the boot code do? Initialize the SoC? If I put my executable in SPI flash, can I still reuse the boot code before jumping to SPI content?

Hey,

What kind of setup do you people use to work with pulpissimo?
I would also like to know about editor extensions that might provide auto-completion, jumping to definition and integration with make build errors.

Goodmirning everyone  

I was trying to track some signals using che schematic tracer built inside Vsim. I tried to do this using the hello test program inside the pulp-rt-examples repo.

I called the simulation enabling the gui using the commands:

Hello, and thanks for let me join inside your community!

I am writing this thread for sharing to all of you the problem I faced building PULP-sdk on a centOS 7 distribution; and how I solved that without let other people to struggle as I did for solving this.

I was trying to recreate and setup the PULPissimo platform due to functionality analysis. I Have installed each of the requested components (gcc, pulp-sdk, pulp-builder, PULPissimo) inside a generic root project folder called  <user_project_folder_path>. Each of those component has been built inside a dedicated folder. In order to be able to simulate the platform, one of the needed steps is to setup and build the sdk. I moved to the PULP sdk main page, and then followed these steps:
Then, I Set the requested env variables, linking the toolchain and vsim paths:

make all, I’ve been able to complete the whole sdk build and setup process, which let me able to move throught the following steps in the process. I still don’t know if this error come for some kind of lacks inside my system or not. If someone inside the PULP team want to try and replicate the behaviour, would be nice to fix the missing dependence from the git list in order to solve this problem for all the users which are using the same operating system as me. Anyway, I Hope this might be useful for all those people will found the same error: here’s the fix which can help you saving a lot of precious time

How can I view the intermediate trees generated after make clean all run in hello example