hi,
   I want run openPULP project in zcu104 FPGA.After i ran update_ips script,i make  zcu104 under the path ../workspace/pulp/pulp/fpga.The following error occurred：
  ERROR: [Synth 8-439] module 'pulpissimo' not found [../workspace/pulp/pulp/fpga/pulpissimo-zcu104/rtl/xilinx_pulpissimo.v:99]
   I want to know how to fix this problem,and Is it necessary to build the SDK?  Can the SDK be built on the centos7 system?and how?

Hi!

I'm new in community, i'd like some help!

I'm trying to run the Hello example from "https://github.com/pulp-platform/pulp-rt-examples" in my Nexys Video FPGA using the bitstream of Pulpissimo.

Until now i'm just following the instructions from README.md file from "https://github.com/pulp-platform/pulpissimo".

I had download and install the Toolchain from pulp-riscv-gnu-toolchain as "Newlib", could someone confirm that it is not necessary install the "Linux" version of this toolchain?


Then i installed the Standard Pulp SDK from "https://github.com/pulp-platform/pulp-sdk/#standard-sdk-build"

I had some issues following the steps, most of them are related with missing steps, like configuring bashrc or some ambient variable, but i was able to solve all of them i believe. I miss some kind of step-by-step, from rtl to running example on FPGA, is it possible create something like that? I think it could be done as a new Thread in forum for the communty, it could help a lot.

I was able to generate the bitstream of Pulpissimo and configure it in Nexys Video FPGA using the JTAG-USB connection. When i run the specific OpenOCD from Pulp-SDK, the OpenOCD is able to identify the Pulpissimo processor in FPGA.

Then i compiled the Hello Example after adding the two weakly defined variables as suggested to configure core and peripherics frequencies. It was compiled with success, the ELF file was properly generate in the build directory.

My problem happen when i had try to use GDB with ELF file to load it to L2 memory of Pulpissimo, the connection between the GDB and OpenOCD looks fine, when i use the Load command it copy the elf file to memory it looks to work fine too, but when i use the Continue command it stops and never end the execution, but it print some kind of assembly commands like;
# j    1c0080ec <__rt_illegal_instr>

So i did the check with gcc in the ELF file to check the Assembly, as suspected it was printing the assembly that has some kind of error i believe, the first piece of assembly code is like that;

Hello,

I am currently evaluating the use of RISC-V processors in FPGAs. Has anyone implemented a PULPino or PULPissimo on an FPGA and can you make rough statements about the resource usage?

I would appreciate any information. Thanks in advance.

Hi there 

I was wondering if there is any opportunity to work with the Eclipse IDE to program and debug the PULPissimo that is running on a NEXYS 4 board?

Or is there any other IDE, that would be able to do that?

Would really like to find an easier way to work with PULPissimo than compiling, downloading and debugging from the command line.

Thank you very much for all kind of ideas.

Hi,
I followed the readme file of pulpissimo  for building an RTL simulation platform. After the following steps

Hello everyone,
Could someone please help me bypass the FLL logic ? I want to use an external clock for my design.
At the moment, I have removed the gf22_FLL instances and tried to connect soc_clk and per_clk directly to ref_clk.
Could anyone please share their experience of bypassing the FLL ? How did you handle the rest of the logic present in soc_clk_rst_gen.sv file ?
With this, I get error captured in the attachment. 

Cheers

Attached Files

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I am trying to synthesize Pulpissimo with Vivado 2019.2 for nexys A7-100. I get the following errors:

We are currently evaluating the RI5CY core for our project and the possibility of adding custom instructions is important for us. Some other cores (Sifive E31, Vexriscv) have simple and documented ways to do this, but I couldn't find the information about RI5CY. HWPEs are great but we may need a true custom instruction support for our needs.

Hello,

while looking at the pulp-rt-examples I found the uart examples and I was wondering if it's possible to print the contents of the buffer to minicom using the rt_uart_write function.
I have already tested the hello example on ZedBoard and the printf works just fine with minicom.
Now I was wondering if it's possible to write the same Hello! to minicom using the rt_uart_write function.
If I run the send example I don't get any output on minicom or in RTL simulation.
Same if I put a string in the buffer instead of the loop that is used in the example.
Shouldn't it be possible to get something on minicom with this method somehow?
I also played around with the RTS and CTS signals as i didn't want to have them float, even tho it worked with the normal hello example, but it didn't help with the above method.
Does anyone have any experience with this?

Edit: I managed to make it work. It was an issue in the code of the app I tried to run.

Thank you,
LPLA

Hi,
I am trying to compile a simple code which has global arrays. I have initialized all the global arrays to make sure the compiler does not generate the code to initialize them to 0. However, I am still getting these "memset" calls in the _start section of the assembly.

<?php 

-fno-zero-initialized-in-bss